Module gd32f1::gd32f190::timer15::ctl0[][src]

control register 0

Structs

ARSE_R

Field ARSE reader - Auto-reload shadow enable

ARSE_W

Field ARSE writer - Auto-reload shadow enable

CEN_R

Field CEN reader - Counter enable

CEN_W

Field CEN writer - Counter enable

CKDIV_R

Field CKDIV reader - Clock division

CKDIV_W

Field CKDIV writer - Clock division

CTL0_SPEC

control register 0

R

Register CTL0 reader

SPM_R

Field SPM reader - Single pulse mode

SPM_W

Field SPM writer - Single pulse mode

UPDIS_R

Field UPDIS reader - Update disable

UPDIS_W

Field UPDIS writer - Update disable

UPS_R

Field UPS reader - Update source

UPS_W

Field UPS writer - Update source

W

Register CTL0 writer

Enums

ARSE_A

Auto-reload shadow enable

CEN_A

Counter enable

CKDIV_A

Clock division

SPM_A

Single pulse mode

UPDIS_A

Update disable

UPS_A

Update source