Module gd32f1::gd32f130::gpiob::ctl [−][src]
GPIO port control register
Structs
| CTL0_W | Field |
| CTL1_W | Field |
| CTL2_W | Field |
| CTL3_W | Field |
| CTL4_W | Field |
| CTL5_W | Field |
| CTL6_W | Field |
| CTL7_W | Field |
| CTL8_W | Field |
| CTL9_W | Field |
| CTL10_W | Field |
| CTL11_W | Field |
| CTL12_W | Field |
| CTL13_W | Field |
| CTL14_W | Field |
| CTL15_R | Field |
| CTL15_W | Field |
| CTL_SPEC | GPIO port control register |
| R | Register |
| W | Register |
Enums
| CTL15_A | Pin 15 configuration bits |
Type Definitions
| CTL0_A | Pin 0 configuration bits |
| CTL0_R | Field |
| CTL1_A | Pin 1 configuration bits |
| CTL1_R | Field |
| CTL2_A | Pin 2 configuration bits |
| CTL2_R | Field |
| CTL3_A | Pin 3 configuration bits |
| CTL3_R | Field |
| CTL4_A | Pin 4 configuration bits |
| CTL4_R | Field |
| CTL5_A | Pin 5 configuration bits |
| CTL5_R | Field |
| CTL6_A | Pin 6 configuration bits |
| CTL6_R | Field |
| CTL7_A | Pin 7 configuration bits |
| CTL7_R | Field |
| CTL8_A | Pin 8 configuration bits |
| CTL8_R | Field |
| CTL9_A | Pin 9 configuration bits |
| CTL9_R | Field |
| CTL10_A | Pin 10 configuration bits |
| CTL10_R | Field |
| CTL11_A | Pin 11 configuration bits |
| CTL11_R | Field |
| CTL12_A | Pin 12 configuration bits |
| CTL12_R | Field |
| CTL13_A | Pin 13 configuration bits |
| CTL13_R | Field |
| CTL14_A | Pin 14 configuration bits |
| CTL14_R | Field |