Module gd32f1::gd32f130::timer1::ctl1[−][src]

control register 1

Structs

DMAS_W	Write proxy for field `DMAS`
MMC_W	Write proxy for field `MMC`
TI0S_W	Write proxy for field `TI0S`

Enums

Master mode control

Type Definitions

DMAS_R	Reader of field `DMAS`
MMC_R	Reader of field `MMC`
R	Reader of register CTL1
TI0S_R	Reader of field `TI0S`
W	Writer for register CTL1