Expand description
The library allows to easily convert Gate circuit from/to one of few foreign formats.
This library is used by gateconvert_exec program that allow conversion by command line
interface.
A conversion to foreign logic format writes result data into output (by Write trait).
A conversion from foreign logic format returns Gate circuit object and sometimes
additional mapping. Any functions that make conversion returns Result to allow handle
various errors.
Re-exports§
Modules§
- aiger
- Module to conversion between Gate circuit and the AIGER logic format.
- blif
- Module to conversion between Gate circuit and the BLIF logic format.
- btor2
- Module to conversion between Gate circuit and the BTOR2 logic format.
- cnf
- Module to conversion between Gate circuit and the DIMACS CNF (Conjuctive Normal Form) format.
- verilog
- Module to conversion between Gate circuit and the Verilog language.
- vhdl
- Module to conversion between Gate circuit and the VHDL language.
Enums§
- Assign
Entry - Entry of assignment for mapping.
- VNegs
- Utility to mark negation
Functions§
- assign_
map_ to_ string - Generate output string from mapping.
- map_
to_ string - Generate output string from mapping. The
Tmust be convertible to string. - string_
assign_ map_ to_ string - Generate output string from mapping.