Module fomu_pac::reboot

REBOOT

Modules

addr0	Bits 0-7 of REBOOT_ADDR.
addr1	Bits 8-15 of REBOOT_ADDR.
addr2	Bits 16-23 of REBOOT_ADDR.
addr3	Bits 24-31 of REBOOT_ADDR. This sets the reset vector for the VexRiscv. This address will be used whenever the CPU is reset, for example through a debug bridge. You should update this address whenever you load a new program, to enable the debugger to run mon reset
ctrl	Provides support for rebooting the FPGA. You can select which of the four images to reboot to, just be sure to OR the image number with 0xac. For example, to reboot to the bootloader (image 0), write ``0xac``` to this register.

Structs

RegisterBlock

Register block

Type Definitions

ADDR0	Bits 0-7 of REBOOT_ADDR.
ADDR1	Bits 8-15 of REBOOT_ADDR.
ADDR2	Bits 16-23 of REBOOT_ADDR.
ADDR3	Bits 24-31 of REBOOT_ADDR. This sets the reset vector for the VexRiscv. This address will be used whenever the CPU is reset, for example through a debug bridge. You should update this address whenever you load a new program, to enable the debugger to run mon reset
CTRL	Provides support for rebooting the FPGA. You can select which of the four images to reboot to, just be sure to OR the image number with 0xac. For example, to reboot to the bootloader (image 0), write ``0xac``` to this register.