Expand description
SPI slave control register
Structs§
- SPI slave control register
Type Aliases§
- Field
CLK_MODE_13
reader - {CPOL, CPHA},1: support spi clk mode 1 and 3, first edge output data B[0]/B[7]. 0: support spi clk mode 0 and 2, first edge output data B[1]/B[6]. - Field
CLK_MODE_13
writer - {CPOL, CPHA},1: support spi clk mode 1 and 3, first edge output data B[0]/B[7]. 0: support spi clk mode 0 and 2, first edge output data B[1]/B[6]. - Field
CLK_MODE
reader - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on. Can be configured in CONF state. - Field
CLK_MODE
writer - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on. Can be configured in CONF state. - Field
DMA_SEG_MAGIC_VALUE
reader - The magic value of BM table in master DMA seg-trans. - Field
DMA_SEG_MAGIC_VALUE
writer - The magic value of BM table in master DMA seg-trans. - Field
MODE
reader - Set SPI work mode. 1: slave mode 0: master mode. - Field
MODE
writer - Set SPI work mode. 1: slave mode 0: master mode. - Register
SLAVE
reader - Field
RSCK_DATA_OUT
reader - It saves half a cycle when tsck is the same as rsck. 1: output data at rsck posedge 0: output data at tsck posedge - Field
RSCK_DATA_OUT
writer - It saves half a cycle when tsck is the same as rsck. 1: output data at rsck posedge 0: output data at tsck posedge - Field
SLV_RDBUF_BITLEN_EN
reader - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in CPU controlled mode(Rd_BUF). 0: others - Field
SLV_RDBUF_BITLEN_EN
writer - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in CPU controlled mode(Rd_BUF). 0: others - Field
SLV_RDDMA_BITLEN_EN
reader - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in DMA controlled mode(Rd_DMA). 0: others - Field
SLV_RDDMA_BITLEN_EN
writer - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in DMA controlled mode(Rd_DMA). 0: others - Field
SLV_WRBUF_BITLEN_EN
reader - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in CPU controlled mode(Wr_BUF). 0: others - Field
SLV_WRBUF_BITLEN_EN
writer - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in CPU controlled mode(Wr_BUF). 0: others - Field
SLV_WRDMA_BITLEN_EN
reader - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in DMA controlled mode(Wr_DMA). 0: others - Field
SLV_WRDMA_BITLEN_EN
writer - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in DMA controlled mode(Wr_DMA). 0: others - Field
SOFT_RESET
writer - Software reset enable, reset the spi clock line cs line and data lines. Can be configured in CONF state. - Field
USR_CONF
reader - 1: Enable the DMA CONF phase of current seg-trans operation, which means seg-trans will start. 0: This is not seg-trans mode. - Field
USR_CONF
writer - 1: Enable the DMA CONF phase of current seg-trans operation, which means seg-trans will start. 0: This is not seg-trans mode. - Register
SLAVE
writer