Module esp32c3::spi0::ctrl

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Expand description

SPI0 control register.

Structs§

Type Aliases§

  • Field D_POL reader - The bit is used to set MOSI line polarity, 1: high 0, low
  • Field D_POL writer - The bit is used to set MOSI line polarity, 1: high 0, low
  • Field FASTRD_MODE reader - This bit enable the bits: spi_mem_fread_qio, spi_mem_fread_dio, spi_mem_fread_qout and spi_mem_fread_dout. 1: enable 0: disable.
  • Field FASTRD_MODE writer - This bit enable the bits: spi_mem_fread_qio, spi_mem_fread_dio, spi_mem_fread_qout and spi_mem_fread_dout. 1: enable 0: disable.
  • Field FCMD_DUAL reader - Apply 2 signals during command phase 1:enable 0: disable
  • Field FCMD_DUAL writer - Apply 2 signals during command phase 1:enable 0: disable
  • Field FCMD_QUAD reader - Apply 4 signals during command phase 1:enable 0: disable
  • Field FCMD_QUAD writer - Apply 4 signals during command phase 1:enable 0: disable
  • Field FDUMMY_OUT reader - In the dummy phase the signal level of spi is output by the spi controller.
  • Field FDUMMY_OUT writer - In the dummy phase the signal level of spi is output by the spi controller.
  • Field FREAD_DIO reader - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_DIO writer - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_DUAL reader - In the read operations, read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_DUAL writer - In the read operations, read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_QIO reader - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.
  • Field FREAD_QIO writer - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.
  • Field FREAD_QUAD reader - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.
  • Field FREAD_QUAD writer - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.
  • Field Q_POL reader - The bit is used to set MISO line polarity, 1: high 0, low
  • Field Q_POL writer - The bit is used to set MISO line polarity, 1: high 0, low
  • Register CTRL reader
  • Register CTRL writer
  • Field WP reader - Write protect signal output when SPI is idle. 1: output high, 0: output low.
  • Field WP writer - Write protect signal output when SPI is idle. 1: output high, 0: output low.