Expand description
GPIO pin configuration register
Structs§
- GPIO pin configuration register
Type Aliases§
- Field
CONFIG
reader - reserved - Field
CONFIG
writer - reserved - Field
INT_ENA
reader - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt. - Field
INT_ENA
writer - set bit 13 to enable CPU interrupt. set bit 14 to enable CPU(not shielded) interrupt. - Field
INT_TYPE
reader - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level - Field
INT_TYPE
writer - set this value to choose interrupt mode. 0:disable GPIO interrupt. 1:trigger at posedge. 2:trigger at negedge. 3:trigger at any edge. 4:valid at low level. 5:valid at high level - Field
PAD_DRIVER
reader - set this bit to select pad driver. 1:open-drain. 0:normal. - Field
PAD_DRIVER
writer - set this bit to select pad driver. 1:open-drain. 0:normal. - Register
PIN%s
reader - Field
SYNC1_BYPASS
reader - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge. - Field
SYNC1_BYPASS
writer - set GPIO input_sync1 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge. - Field
SYNC2_BYPASS
reader - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge. - Field
SYNC2_BYPASS
writer - set GPIO input_sync2 signal mode. 0:disable. 1:trigger at negedge. 2or3:trigger at posedge. - Register
PIN%s
writer - Field
WAKEUP_ENABLE
reader - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode) - Field
WAKEUP_ENABLE
writer - set this bit to enable GPIO wakeup.(can only wakeup CPU from Light-sleep Mode)