Module esp32c3::efuse::rd_repeat_data0

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BLOCK0 data register 1.

Structs§

Type Aliases§

  • Field BTLC_GPIO_ENABLE reader - Enable btlc gpio.
  • Field DIS_CAN reader - Set this bit to disable CAN function.
  • Field DIS_DOWNLOAD_ICACHE reader - Set this bit to disable Icache in download mode (boot_mode[3:0] is 0, 1, 2, 3, 6, 7).
  • Field DIS_DOWNLOAD_MANUAL_ENCRYPT reader - Set this bit to disable flash encryption when in download boot modes.
  • Field DIS_FORCE_DOWNLOAD reader - Set this bit to disable the function that forces chip into download mode.
  • Field DIS_ICACHE reader - Set this bit to disable Icache.
  • Field DIS_PAD_JTAG reader - Set this bit to disable JTAG in the hard way. JTAG is disabled permanently.
  • Field DIS_RTC_RAM_BOOT reader - Set this bit to disable boot from RTC RAM.
  • Field DIS_USB_DEVICE reader - Set this bit to disable usb device.
  • Field DIS_USB_JTAG reader - Set this bit to disable function of usb switch to jtag in module of usb device.
  • Field JTAG_SEL_ENABLE reader - Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
  • Field POWERGLITCH_EN reader - Set this bit to enable power glitch function.
  • Field POWER_GLITCH_DSENSE reader - Sample delay configuration of power glitch.
  • Register RD_REPEAT_DATA0 reader
  • Field RD_DIS reader - Set this bit to disable reading from BlOCK4-10.
  • Field RPT4_RESERVED6 reader - Reserved (used for four backups method).
  • Field SOFT_DIS_JTAG reader - Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module.
  • Field USB_DREFH reader - Controls single-end input threshold vrefh, 1.76 V to 2 V with step of 80 mV, stored in eFuse.
  • Field USB_DREFL reader - Controls single-end input threshold vrefl, 0.8 V to 1.04 V with step of 80 mV, stored in eFuse.
  • Field USB_EXCHG_PINS reader - Set this bit to exchange USB D+ and D- pins.
  • Field VDD_SPI_AS_GPIO reader - Set this bit to vdd spi pin function as gpio.