Expand description
SPI0 user register.
Structs§
- SPI0 user register.
Type Aliases§
- Field
CK_OUT_EDGE
reader - the bit combined with spi_mem_mosi_delay_mode bits to set mosi signal delay mode. - Field
CK_OUT_EDGE
writer - the bit combined with spi_mem_mosi_delay_mode bits to set mosi signal delay mode. - Field
CS_HOLD
reader - spi cs keep low when spi is in done phase. 1: enable 0: disable. - Field
CS_HOLD
writer - spi cs keep low when spi is in done phase. 1: enable 0: disable. - Field
CS_SETUP
reader - spi cs is enable when spi is in prepare phase. 1: enable 0: disable. - Field
CS_SETUP
writer - spi cs is enable when spi is in prepare phase. 1: enable 0: disable. - Register
USER
reader - Field
USR_DUMMY_IDLE
reader - spi clock is disable in dummy phase when the bit is enable. - Field
USR_DUMMY_IDLE
writer - spi clock is disable in dummy phase when the bit is enable. - Field
USR_DUMMY
reader - This bit enable the dummy phase of an operation. - Field
USR_DUMMY
writer - This bit enable the dummy phase of an operation. - Register
USER
writer