Type Alias esp32c3::spi0::core_clk_sel::SPI01_CLK_SEL_W

pub type SPI01_CLK_SEL_W<'a, REG> = FieldWriter<'a, REG, 2>;

Field SPI01_CLK_SEL writer - When the digital system clock selects PLL clock and the frequency of PLL clock is 480MHz, the value of reg_spi01_clk_sel: 0: SPI0/1 module clock (clk) is 80MHz. 1: SPI0/1 module clock (clk) is 120MHz. 2: SPI0/1 module clock (clk) 160MHz. 3: Not used. When the digital system clock selects PLL clock and the frequency of PLL clock is 320MHz, the value of reg_spi01_clk_sel: 0: SPI0/1 module clock (clk) is 80MHz. 1: SPI0/1 module clock (clk) is 80MHz. 2: SPI0/1 module clock (clk) 160MHz. 3: Not used.

Aliased Type

struct SPI01_CLK_SEL_W<'a, REG> { /* private fields */ }