Module esp32::timg0::wdtconfig0
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Re-exports
pub use WDT_STG3_R as WDT_STG2_R;pub use WDT_STG3_R as WDT_STG1_R;pub use WDT_STG3_R as WDT_STG0_R;pub use WDT_STG3_W as WDT_STG2_W;pub use WDT_STG3_W as WDT_STG1_W;pub use WDT_STG3_W as WDT_STG0_W;Structs
Register
WDTCONFIG0 readerRegister
WDTCONFIG0 writerEnums
length of CPU reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2us
Stage 3 configuration. 0: off 1: interrupt 2: reset CPU 3: reset system
length of system reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2us
Type Definitions
Field
WDT_CPU_RESET_LENGTH reader - length of CPU reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2usField
WDT_CPU_RESET_LENGTH writer - length of CPU reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2usField
WDT_EDGE_INT_EN reader - When set edge type interrupt generation is enabledField
WDT_EDGE_INT_EN writer - When set edge type interrupt generation is enabledField
WDT_EN reader - When set SWDT is enabledField
WDT_EN writer - When set SWDT is enabledField
WDT_FLASHBOOT_MOD_EN reader - When set flash boot protection is enabledField
WDT_FLASHBOOT_MOD_EN writer - When set flash boot protection is enabledField
WDT_LEVEL_INT_EN reader - When set level type interrupt generation is enabledField
WDT_LEVEL_INT_EN writer - When set level type interrupt generation is enabledField
WDT_STG3 reader - Stage 3 configuration. 0: off 1: interrupt 2: reset CPU 3: reset systemField
WDT_STG3 writer - Stage 3 configuration. 0: off 1: interrupt 2: reset CPU 3: reset systemField
WDT_SYS_RESET_LENGTH reader - length of system reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2usField
WDT_SYS_RESET_LENGTH writer - length of system reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2us