[][src]Module esp32::spi

SPI

Modules

spi_cache_fctrl_reg

SPI_CACHE_FCTRL_REG(i)

spi_cache_sctrl_reg

SPI_CACHE_SCTRL_REG(i)

spi_clock_reg

SPI_CLOCK_REG(i)

spi_cmd_reg

SPI_CMD_REG(i)

spi_ctrl1_reg

SPI_CTRL1_REG(i)

spi_ctrl2_reg

SPI_CTRL2_REG(i)

spi_ctrl_reg

SPI_CTRL_REG(i)

spi_date_reg

SPI_DATE_REG(i)

spi_dma_conf_reg

SPI_DMA_CONF_REG(i)

spi_dma_in_link_reg

SPI_DMA_IN_LINK_REG(i)

spi_dma_int_clr_reg

SPI_DMA_INT_CLR_REG(i)

spi_dma_int_ena_reg

SPI_DMA_INT_ENA_REG(i)

spi_dma_int_raw_reg

SPI_DMA_INT_RAW_REG(i)

spi_dma_int_st_reg

SPI_DMA_INT_ST_REG(i)

spi_dma_out_link_reg

SPI_DMA_OUT_LINK_REG(i)

spi_dma_rstatus_reg

SPI_DMA_RSTATUS_REG(i)

spi_dma_status_reg

SPI_DMA_STATUS_REG(i)

spi_dma_tstatus_reg

SPI_DMA_TSTATUS_REG(i)

spi_ext0_reg

SPI_EXT0_REG(i)

spi_ext1_reg

SPI_EXT1_REG(i)

spi_ext2_reg

SPI_EXT2_REG(i)

spi_ext3_reg

SPI_EXT3_REG(i)

spi_in_err_eof_des_addr_reg

SPI_IN_ERR_EOF_DES_ADDR_REG(i)

spi_in_suc_eof_des_addr_reg

SPI_IN_SUC_EOF_DES_ADDR_REG(i)

spi_inlink_dscr_bf0_reg

SPI_INLINK_DSCR_BF0_REG(i)

spi_inlink_dscr_bf1_reg

SPI_INLINK_DSCR_BF1_REG(i)

spi_inlink_dscr_reg

SPI_INLINK_DSCR_REG(i)

spi_miso_dlen_reg

SPI_MISO_DLEN_REG(i)

spi_mosi_dlen_reg

SPI_MOSI_DLEN_REG(i)

spi_out_eof_bfr_des_addr_reg

SPI_OUT_EOF_BFR_DES_ADDR_REG(i)

spi_out_eof_des_addr_reg

SPI_OUT_EOF_DES_ADDR_REG(i)

spi_outlink_dscr_bf0_reg

SPI_OUTLINK_DSCR_BF0_REG(i)

spi_outlink_dscr_bf1_reg

SPI_OUTLINK_DSCR_BF1_REG(i)

spi_outlink_dscr_reg

SPI_OUTLINK_DSCR_REG(i)

spi_pin_reg

SPI_PIN_REG(i)

spi_rd_status_reg

SPI_RD_STATUS_REG(i)

spi_slave1_reg

SPI_SLAVE1_REG(i)

spi_slave2_reg

SPI_SLAVE2_REG(i)

spi_slave3_reg

SPI_SLAVE3_REG(i)

spi_slave_reg

SPI_SLAVE_REG(i)

spi_slv_rd_bit_reg

SPI_SLV_RD_BIT_REG(i)

spi_slv_rdbuf_dlen_reg

SPI_SLV_RDBUF_DLEN_REG(i)

spi_slv_wr_status_reg

SPI_SLV_WR_STATUS_REG(i)

spi_slv_wrbuf_dlen_reg

SPI_SLV_WRBUF_DLEN_REG(i)

spi_sram_cmd_reg

SPI_SRAM_CMD_REG(i)

spi_sram_drd_cmd_reg

SPI_SRAM_DRD_CMD_REG(i)

spi_sram_dwr_cmd_reg

SPI_SRAM_DWR_CMD_REG(i)

spi_tx_crc_reg

SPI_TX_CRC_REG(i)

spi_user1_reg

SPI_USER1_REG(i)

spi_user2_reg

SPI_USER2_REG(i)

spi_user_reg

SPI_USER_REG(i)

spi_w0_reg

SPI_W0_REG(i)

spi_w1_reg

SPI_W1_REG(i)

spi_w2_reg

SPI_W2_REG(i)

spi_w3_reg

SPI_W3_REG(i)

spi_w4_reg

SPI_W4_REG(i)

spi_w5_reg

SPI_W5_REG(i)

spi_w6_reg

SPI_W6_REG(i)

spi_w7_reg

SPI_W7_REG(i)

spi_w8_reg

SPI_W8_REG(i)

spi_w9_reg

SPI_W9_REG(i)

spi_w10_reg

SPI_W10_REG(i)

spi_w11_reg

SPI_W11_REG(i)

spi_w12_reg

SPI_W12_REG(i)

spi_w13_reg

SPI_W13_REG(i)

spi_w14_reg

SPI_W14_REG(i)

spi_w15_reg

SPI_W15_REG(i)

Structs

RegisterBlock

Register block

Type Definitions

SPI_CACHE_FCTRL_REG

SPI_CACHE_FCTRL_REG(i)

SPI_CACHE_SCTRL_REG

SPI_CACHE_SCTRL_REG(i)

SPI_CLOCK_REG

SPI_CLOCK_REG(i)

SPI_CMD_REG

SPI_CMD_REG(i)

SPI_CTRL1_REG

SPI_CTRL1_REG(i)

SPI_CTRL2_REG

SPI_CTRL2_REG(i)

SPI_CTRL_REG

SPI_CTRL_REG(i)

SPI_DATE_REG

SPI_DATE_REG(i)

SPI_DMA_CONF_REG

SPI_DMA_CONF_REG(i)

SPI_DMA_INT_CLR_REG

SPI_DMA_INT_CLR_REG(i)

SPI_DMA_INT_ENA_REG

SPI_DMA_INT_ENA_REG(i)

SPI_DMA_INT_RAW_REG

SPI_DMA_INT_RAW_REG(i)

SPI_DMA_INT_ST_REG

SPI_DMA_INT_ST_REG(i)

SPI_DMA_IN_LINK_REG

SPI_DMA_IN_LINK_REG(i)

SPI_DMA_OUT_LINK_REG

SPI_DMA_OUT_LINK_REG(i)

SPI_DMA_RSTATUS_REG

SPI_DMA_RSTATUS_REG(i)

SPI_DMA_STATUS_REG

SPI_DMA_STATUS_REG(i)

SPI_DMA_TSTATUS_REG

SPI_DMA_TSTATUS_REG(i)

SPI_EXT0_REG

SPI_EXT0_REG(i)

SPI_EXT1_REG

SPI_EXT1_REG(i)

SPI_EXT2_REG

SPI_EXT2_REG(i)

SPI_EXT3_REG

SPI_EXT3_REG(i)

SPI_INLINK_DSCR_BF0_REG

SPI_INLINK_DSCR_BF0_REG(i)

SPI_INLINK_DSCR_BF1_REG

SPI_INLINK_DSCR_BF1_REG(i)

SPI_INLINK_DSCR_REG

SPI_INLINK_DSCR_REG(i)

SPI_IN_ERR_EOF_DES_ADDR_REG

SPI_IN_ERR_EOF_DES_ADDR_REG(i)

SPI_IN_SUC_EOF_DES_ADDR_REG

SPI_IN_SUC_EOF_DES_ADDR_REG(i)

SPI_MISO_DLEN_REG

SPI_MISO_DLEN_REG(i)

SPI_MOSI_DLEN_REG

SPI_MOSI_DLEN_REG(i)

SPI_OUTLINK_DSCR_BF0_REG

SPI_OUTLINK_DSCR_BF0_REG(i)

SPI_OUTLINK_DSCR_BF1_REG

SPI_OUTLINK_DSCR_BF1_REG(i)

SPI_OUTLINK_DSCR_REG

SPI_OUTLINK_DSCR_REG(i)

SPI_OUT_EOF_BFR_DES_ADDR_REG

SPI_OUT_EOF_BFR_DES_ADDR_REG(i)

SPI_OUT_EOF_DES_ADDR_REG

SPI_OUT_EOF_DES_ADDR_REG(i)

SPI_PIN_REG

SPI_PIN_REG(i)

SPI_RD_STATUS_REG

SPI_RD_STATUS_REG(i)

SPI_SLAVE1_REG

SPI_SLAVE1_REG(i)

SPI_SLAVE2_REG

SPI_SLAVE2_REG(i)

SPI_SLAVE3_REG

SPI_SLAVE3_REG(i)

SPI_SLAVE_REG

SPI_SLAVE_REG(i)

SPI_SLV_RDBUF_DLEN_REG

SPI_SLV_RDBUF_DLEN_REG(i)

SPI_SLV_RD_BIT_REG

SPI_SLV_RD_BIT_REG(i)

SPI_SLV_WRBUF_DLEN_REG

SPI_SLV_WRBUF_DLEN_REG(i)

SPI_SLV_WR_STATUS_REG

SPI_SLV_WR_STATUS_REG(i)

SPI_SRAM_CMD_REG

SPI_SRAM_CMD_REG(i)

SPI_SRAM_DRD_CMD_REG

SPI_SRAM_DRD_CMD_REG(i)

SPI_SRAM_DWR_CMD_REG

SPI_SRAM_DWR_CMD_REG(i)

SPI_TX_CRC_REG

SPI_TX_CRC_REG(i)

SPI_USER1_REG

SPI_USER1_REG(i)

SPI_USER2_REG

SPI_USER2_REG(i)

SPI_USER_REG

SPI_USER_REG(i)

SPI_W0_REG

SPI_W0_REG(i)

SPI_W1_REG

SPI_W1_REG(i)

SPI_W2_REG

SPI_W2_REG(i)

SPI_W3_REG

SPI_W3_REG(i)

SPI_W4_REG

SPI_W4_REG(i)

SPI_W5_REG

SPI_W5_REG(i)

SPI_W6_REG

SPI_W6_REG(i)

SPI_W7_REG

SPI_W7_REG(i)

SPI_W8_REG

SPI_W8_REG(i)

SPI_W9_REG

SPI_W9_REG(i)

SPI_W10_REG

SPI_W10_REG(i)

SPI_W11_REG

SPI_W11_REG(i)

SPI_W12_REG

SPI_W12_REG(i)

SPI_W13_REG

SPI_W13_REG(i)

SPI_W14_REG

SPI_W14_REG(i)

SPI_W15_REG

SPI_W15_REG(i)