[−][src]Module esp32::sens
SENS
Modules
| sens_sar_atten1_reg | SENS_SAR_ATTEN1_REG |
| sens_sar_atten2_reg | SENS_SAR_ATTEN2_REG |
| sens_sar_dac_ctrl1_reg | SENS_SAR_DAC_CTRL1_REG |
| sens_sar_dac_ctrl2_reg | SENS_SAR_DAC_CTRL2_REG |
| sens_sar_i2c_ctrl_reg | SENS_SAR_I2C_CTRL_REG |
| sens_sar_meas_ctrl2_reg | SENS_SAR_MEAS_CTRL2_REG |
| sens_sar_meas_ctrl_reg | SENS_SAR_MEAS_CTRL_REG |
| sens_sar_meas_start1_reg | SENS_SAR_MEAS_START1_REG |
| sens_sar_meas_start2_reg | SENS_SAR_MEAS_START2_REG |
| sens_sar_meas_wait1_reg | SENS_SAR_MEAS_WAIT1_REG |
| sens_sar_meas_wait2_reg | SENS_SAR_MEAS_WAIT2_REG |
| sens_sar_mem_wr_ctrl_reg | SENS_SAR_MEM_WR_CTRL_REG |
| sens_sar_nouse_reg | SENS_SAR_NOUSE_REG |
| sens_sar_read_ctrl2_reg | SENS_SAR_READ_CTRL2_REG |
| sens_sar_read_ctrl_reg | SENS_SAR_READ_CTRL_REG |
| sens_sar_read_status1_reg | SENS_SAR_READ_STATUS1_REG |
| sens_sar_read_status2_reg | SENS_SAR_READ_STATUS2_REG |
| sens_sar_slave_addr1_reg | SENS_SAR_SLAVE_ADDR1_REG |
| sens_sar_slave_addr2_reg | SENS_SAR_SLAVE_ADDR2_REG |
| sens_sar_slave_addr3_reg | SENS_SAR_SLAVE_ADDR3_REG |
| sens_sar_slave_addr4_reg | SENS_SAR_SLAVE_ADDR4_REG |
| sens_sar_start_force_reg | SENS_SAR_START_FORCE_REG |
| sens_sar_touch_ctrl1_reg | SENS_SAR_TOUCH_CTRL1_REG |
| sens_sar_touch_ctrl2_reg | SENS_SAR_TOUCH_CTRL2_REG |
| sens_sar_touch_enable_reg | SENS_SAR_TOUCH_ENABLE_REG |
| sens_sar_touch_out1_reg | SENS_SAR_TOUCH_OUT1_REG |
| sens_sar_touch_out2_reg | SENS_SAR_TOUCH_OUT2_REG |
| sens_sar_touch_out3_reg | SENS_SAR_TOUCH_OUT3_REG |
| sens_sar_touch_out4_reg | SENS_SAR_TOUCH_OUT4_REG |
| sens_sar_touch_out5_reg | SENS_SAR_TOUCH_OUT5_REG |
| sens_sar_touch_thres1_reg | SENS_SAR_TOUCH_THRES1_REG |
| sens_sar_touch_thres2_reg | SENS_SAR_TOUCH_THRES2_REG |
| sens_sar_touch_thres3_reg | SENS_SAR_TOUCH_THRES3_REG |
| sens_sar_touch_thres4_reg | SENS_SAR_TOUCH_THRES4_REG |
| sens_sar_touch_thres5_reg | SENS_SAR_TOUCH_THRES5_REG |
| sens_sar_tsens_ctrl_reg | SENS_SAR_TSENS_CTRL_REG |
| sens_sardate_reg | SENS_SARDATE_REG |
| sens_ulp_cp_sleep_cyc0_reg | SENS_ULP_CP_SLEEP_CYC0_REG |
| sens_ulp_cp_sleep_cyc1_reg | SENS_ULP_CP_SLEEP_CYC1_REG |
| sens_ulp_cp_sleep_cyc2_reg | SENS_ULP_CP_SLEEP_CYC2_REG |
| sens_ulp_cp_sleep_cyc3_reg | SENS_ULP_CP_SLEEP_CYC3_REG |
| sens_ulp_cp_sleep_cyc4_reg | SENS_ULP_CP_SLEEP_CYC4_REG |
Structs
| RegisterBlock | Register block |
Type Definitions
| SENS_SARDATE_REG | SENS_SARDATE_REG |
| SENS_SAR_ATTEN1_REG | SENS_SAR_ATTEN1_REG |
| SENS_SAR_ATTEN2_REG | SENS_SAR_ATTEN2_REG |
| SENS_SAR_DAC_CTRL1_REG | SENS_SAR_DAC_CTRL1_REG |
| SENS_SAR_DAC_CTRL2_REG | SENS_SAR_DAC_CTRL2_REG |
| SENS_SAR_I2C_CTRL_REG | SENS_SAR_I2C_CTRL_REG |
| SENS_SAR_MEAS_CTRL2_REG | SENS_SAR_MEAS_CTRL2_REG |
| SENS_SAR_MEAS_CTRL_REG | SENS_SAR_MEAS_CTRL_REG |
| SENS_SAR_MEAS_START1_REG | SENS_SAR_MEAS_START1_REG |
| SENS_SAR_MEAS_START2_REG | SENS_SAR_MEAS_START2_REG |
| SENS_SAR_MEAS_WAIT1_REG | SENS_SAR_MEAS_WAIT1_REG |
| SENS_SAR_MEAS_WAIT2_REG | SENS_SAR_MEAS_WAIT2_REG |
| SENS_SAR_MEM_WR_CTRL_REG | SENS_SAR_MEM_WR_CTRL_REG |
| SENS_SAR_NOUSE_REG | SENS_SAR_NOUSE_REG |
| SENS_SAR_READ_CTRL2_REG | SENS_SAR_READ_CTRL2_REG |
| SENS_SAR_READ_CTRL_REG | SENS_SAR_READ_CTRL_REG |
| SENS_SAR_READ_STATUS1_REG | SENS_SAR_READ_STATUS1_REG |
| SENS_SAR_READ_STATUS2_REG | SENS_SAR_READ_STATUS2_REG |
| SENS_SAR_SLAVE_ADDR1_REG | SENS_SAR_SLAVE_ADDR1_REG |
| SENS_SAR_SLAVE_ADDR2_REG | SENS_SAR_SLAVE_ADDR2_REG |
| SENS_SAR_SLAVE_ADDR3_REG | SENS_SAR_SLAVE_ADDR3_REG |
| SENS_SAR_SLAVE_ADDR4_REG | SENS_SAR_SLAVE_ADDR4_REG |
| SENS_SAR_START_FORCE_REG | SENS_SAR_START_FORCE_REG |
| SENS_SAR_TOUCH_CTRL1_REG | SENS_SAR_TOUCH_CTRL1_REG |
| SENS_SAR_TOUCH_CTRL2_REG | SENS_SAR_TOUCH_CTRL2_REG |
| SENS_SAR_TOUCH_ENABLE_REG | SENS_SAR_TOUCH_ENABLE_REG |
| SENS_SAR_TOUCH_OUT1_REG | SENS_SAR_TOUCH_OUT1_REG |
| SENS_SAR_TOUCH_OUT2_REG | SENS_SAR_TOUCH_OUT2_REG |
| SENS_SAR_TOUCH_OUT3_REG | SENS_SAR_TOUCH_OUT3_REG |
| SENS_SAR_TOUCH_OUT4_REG | SENS_SAR_TOUCH_OUT4_REG |
| SENS_SAR_TOUCH_OUT5_REG | SENS_SAR_TOUCH_OUT5_REG |
| SENS_SAR_TOUCH_THRES1_REG | SENS_SAR_TOUCH_THRES1_REG |
| SENS_SAR_TOUCH_THRES2_REG | SENS_SAR_TOUCH_THRES2_REG |
| SENS_SAR_TOUCH_THRES3_REG | SENS_SAR_TOUCH_THRES3_REG |
| SENS_SAR_TOUCH_THRES4_REG | SENS_SAR_TOUCH_THRES4_REG |
| SENS_SAR_TOUCH_THRES5_REG | SENS_SAR_TOUCH_THRES5_REG |
| SENS_SAR_TSENS_CTRL_REG | SENS_SAR_TSENS_CTRL_REG |
| SENS_ULP_CP_SLEEP_CYC0_REG | SENS_ULP_CP_SLEEP_CYC0_REG |
| SENS_ULP_CP_SLEEP_CYC1_REG | SENS_ULP_CP_SLEEP_CYC1_REG |
| SENS_ULP_CP_SLEEP_CYC2_REG | SENS_ULP_CP_SLEEP_CYC2_REG |
| SENS_ULP_CP_SLEEP_CYC3_REG | SENS_ULP_CP_SLEEP_CYC3_REG |
| SENS_ULP_CP_SLEEP_CYC4_REG | SENS_ULP_CP_SLEEP_CYC4_REG |