embassy_net_wiznet/chip/
mod.rs

1//! Wiznet W5100s and W5500 family driver.
2mod w5500;
3pub use w5500::W5500;
4mod w5100s;
5use embedded_hal_async::spi::SpiDevice;
6pub use w5100s::W5100S;
7
8pub(crate) trait SealedChip {
9    type Address;
10
11    /// The version of the chip as reported by the VERSIONR register.
12    /// This is used to verify that the chip is supported by the driver,
13    /// and that SPI communication is working.
14    const CHIP_VERSION: u8;
15
16    const COMMON_MODE: Self::Address;
17    const COMMON_MAC: Self::Address;
18    const COMMON_SOCKET_INTR: Self::Address;
19    const COMMON_PHY_CFG: Self::Address;
20    const COMMON_VERSION: Self::Address;
21
22    const SOCKET_MODE: Self::Address;
23    const SOCKET_COMMAND: Self::Address;
24    const SOCKET_RXBUF_SIZE: Self::Address;
25    const SOCKET_TXBUF_SIZE: Self::Address;
26    const SOCKET_TX_FREE_SIZE: Self::Address;
27    const SOCKET_TX_DATA_WRITE_PTR: Self::Address;
28    const SOCKET_RECVD_SIZE: Self::Address;
29    const SOCKET_RX_DATA_READ_PTR: Self::Address;
30    const SOCKET_INTR_MASK: Self::Address;
31    const SOCKET_INTR: Self::Address;
32
33    const SOCKET_MODE_VALUE: u8;
34
35    const BUF_SIZE: u16;
36    const AUTO_WRAP: bool;
37
38    fn rx_addr(addr: u16) -> Self::Address;
39    fn tx_addr(addr: u16) -> Self::Address;
40
41    async fn bus_read<SPI: SpiDevice>(spi: &mut SPI, address: Self::Address, data: &mut [u8])
42        -> Result<(), SPI::Error>;
43    async fn bus_write<SPI: SpiDevice>(spi: &mut SPI, address: Self::Address, data: &[u8]) -> Result<(), SPI::Error>;
44}
45
46/// Trait for Wiznet chips.
47#[allow(private_bounds)]
48pub trait Chip: SealedChip {}