Struct ElfFlags 

pub struct ElfFlags(/* private fields */);

Implementations

impl ElfFlags

pub const XGATE_ABI: Self

pub const M68HC11_ABI: Self

pub const M68K_CF_ISA_MASK: Self

Which ISA

pub const IA_64_MASKOS: Self

OS-specific flags.

pub const PICOJAVA_ARCH: Self

pub const BPF_CPUVER: Self

pub const XTENSA_MACH: Self

pub const M32R_IGNORE: Self

pub const NDS32_ELF_VERSION: Self

pub const XGATE_MACH_MASK: Self

pub const M68HC11_MACH_MASK: Self

pub const NDS_ABI: Self

pub const XGATE_MACH: Self

XGATE microcontroller.

pub const ARM_NEW_ABI: Self

pub const AVR_LINKRELAX_PREPARED: Self

pub const FRV_MEDIA: Self

-mmedia

pub const MIPS_OPTIONS_FIRST: Self

pub const IA_64_NOFUNCDESC_CONS_GP: Self

And no function descriptors.

pub const FRV_GPR_MASK: Self

mask for # of gprs

pub const IQ2000_CPU_MASK: Self

specific cpu bits

pub const MT_CPU_MS2: Self

MS2

pub const MT_CPU_MASK: Self

specific cpu bits

pub const M68K_CF_ISA_A_PLUS: Self

pub const IA_64_VMS_COMCOD: Self

Completion code.

pub const Z80_MACH_R800: Self

pub const IA_64_VMS_COMCOD_ABORT: Self

pub const PPC64_ABI: Self

pub const SH3: Self

pub const IQ2000_ALL_FLAGS: Self

pub const BFIN_PIC_FLAGS: Self

pub const SPARCV9_MM: Self

memory model mask

pub const LOONGARCH_ABI_DOUBLE_FLOAT: Self

pub const MT_ALL_FLAGS: Self

pub const FRV_GPR_32: Self

-mgpr-32

pub const RH850_FPU_DOUBLE: Self

sizeof(double) == 8.

pub const S390_HIGH_GPRS: Self

pub const MIPS_NOREORDER: Self

pub const IQ2000_CPU_IQ2000: Self

default

pub const BFIN_PIC: Self

-fpic

pub const NIOS2_ARCH_R2: Self

pub const LM32_MACH: Self

pub const MT_CPU_MRISC: Self

default

pub const ALPHA_32BIT: Self

pub const CRIS_UNDERSCORE: Self

pub const VAX_NONPIC: Self

Object contains non-PIC code

pub const RH850_DATA_ALIGN4: Self

Aligned to 4-byte bounadries.

pub const RH850_DOUBLE32: Self

32-bits in size.

pub const RH850_FPU20: Self

Set if [N]]M{ADD|SUB}F.S are used.

pub const RH850_SIMD: Self

pub const RH850_CACHE: Self

pub const RH850_MMU: Self

pub const RISCV_RVC: Self

pub const VISIUM_ARCH_MCM: Self

pub const M68K_CF_ISA_A_NODIV: Self

ISA A except for div

pub const Z80_MACH_Z80: Self

pub const ARM_RELEXEC: Self

pub const IA_64_TRAPNIL: Self

Trap NIL pointer dereferences.

pub const IA_64_VMS_COMCOD_WARNING: Self

pub const SH1: Self

pub const OR1K_NODELAY: Self

pub const SPARCV9_PSO: Self

partial store ordering

pub const LOONGARCH_ABI_SOFT_FLOAT: Self

pub const C6000_REL: Self

pub const FRV_GPR_64: Self

-mgpr-64

pub const RH850_FPU_SINGLE: Self

sizeof(double) == 4.

pub const MIPS_PIC: Self

pub const IQ2000_CPU_IQ10: Self

IQ10

pub const BFIN_FDPIC: Self

-mfdpic

pub const MT_CPU_MRISC2: Self

MRISC2

pub const ALPHA_CANRELAX: Self

pub const CRIS_VARIANT_V32: Self

pub const RH850_DATA_ALIGN8: Self

Aligned to 8-byte bounadries.

pub const RH850_DOUBLE64: Self

64-bits in size.

pub const RH850_FPU30: Self

Set if ADSF.D or ADDF.D is used.

pub const RISCV_FLOAT_ABI_SINGLE: Self

pub const VISIUM_ARCH_MCM24: Self

pub const M68K_CF_ISA_A: Self

pub const Z80_MACH_Z180: Self

pub const ARM_HASENTRY: Self

pub const IA_64_VMS_COMCOD_ERROR: Self

pub const SH2: Self

pub const SPARCV9_RMO: Self

relaxed store ordering

pub const LOONGARCH_ABI_SINGLE_FLOAT: Self

pub const FRV_FPR_MASK: Self

mask for # of fprs

pub const FRV_FPR_NONE: Self

-msoft-float

pub const SH4A: Self

pub const FRV_FPR_32: Self

-mfpr-32

pub const MIPS_CPIC: Self

pub const CRIS_VARIANT_COMMON_V10_V32: Self

pub const RISCV_FLOAT_ABI_DOUBLE: Self

pub const VISIUM_ARCH_GR6: Self

pub const M68K_CF_ISA_B_NOUSP: Self

ISA_B except for USP

pub const IA_64_VMS_LINKAGES: Self

Contains VMS linkages info.

pub const Z80_MACH_EZ80_Z80: Self

pub const ARM_INTERWORK: Self

pub const ARM_SYMSARESORTED: Self

NB conflicts with EF_INTERWORK.

pub const IA_64_EXT: Self

Program uses arch. extensions.

pub const NDS_ABI_SHIFT: Self

pub const SH_DSP: Self

pub const FRV_FPR_64: Self

-mfpr-64

pub const MIPS_XGOT: Self

pub const RISCV_RVE: Self

pub const IA_64_BE: Self

PSR BE bit set (big-endian).

pub const ARM_APCS_26: Self

pub const ARM_DYNSYMSUSESEGIDX: Self

NB conflicts with EF_APCS26.

pub const SH3E: Self

pub const FRV_DWORD_MASK: Self

mask for dword support

pub const M68K_CF_MAC_MASK: Self

pub const M68K_CF_EMAC_B: Self

EMAC_B

pub const AMDGPU_MACH_AMDGCN_GFX908: Self

pub const FRV_DWORD_YES: Self

use double word insns

pub const MIPS_UCODE: Self

pub const PICOJAVA_NEWCALLS: Self

pub const BFIN_CODE_IN_L1: Self

–code-in-l1

pub const RISCV_TSO: Self

pub const M68K_CF_MAC: Self

MAC

pub const M68HC12_MACH: Self

68HC12 microcontroller.

pub const ARM_APCS_FLOAT: Self

pub const ARM_MAPSYMSFIRST: Self

NB conflicts with EF_APCS_FLOAT.

pub const IA_64_ABI64: Self

64-bit ABI.

pub const SH4_NOFPU: Self

pub const MIPS_64BIT_WHIRL: Self

pub const FRV_DWORD_NO: Self

don’t use double word insn

pub const RH850_REGMODE22: Self

Registers r15-r24 (inclusive) are not used.

pub const MIPS_ABI2: Self

pub const PICOJAVA_GNUCALLS: Self

The (currently) non standard GNU calling convention

pub const BFIN_DATA_IN_L1: Self

–data-in-l1

pub const M68K_CF_EMAC: Self

EMAC

pub const M68HCS12_MACH: Self

68HCS12 microcontroller.

pub const ARM_PIC: Self

pub const IA_64_REDUCEDFP: Self

Only FP6-FP11 used.

pub const AMDGPU_MACH_AMDGCN_MIN: Self

pub const AMDGPU_MACH_AMDGCN_GFX600: Self

pub const FRV_DOUBLE: Self

-mdouble

pub const RH850_REGMODE32: Self

pub const M68K_CF_FLOAT: Self

Has float insns

pub const LOONGARCH_OBJABI_V1: Self

pub const ARM_ALIGN8: Self

8-bit structure alignment is in use.

pub const IA_64_CONS_GP: Self

gp as program wide constant.

pub const AMDGPU_MACH_AMDGCN_GFX940: Self

pub const MIPS_ABI_ON32: Self

pub const FRV_PIC: Self

-fpic

pub const RH850_GP_FIX: Self

r4 is fixed.

pub const MIPS_32BITMODE: Self

pub const MEP_LIBRARY: Self

Built as a library

pub const ARC_PIC: Self

pub const XTENSA_XT_INSN: Self

pub const VAX_DFLOAT: Self

Object contains D-Float insn.

pub const IA_64_ABSOLUTE: Self

Load at absolute addresses.

pub const SPARC_32PLUS: Self

generic V8+ features

pub const ARM_OLD_ABI: Self

pub const SH_PIC: Self

pub const AMDGPU_FEATURE_XNACK_V3: Self

pub const AMDGPU_FEATURE_XNACK_ANY_V4: Self

pub const FRV_NON_PIC_RELOCS: Self

used non pic safe relocs

pub const RH850_GP_NOFIX: Self

r4 is callee save.

pub const MIPS_FP64: Self

pub const XTENSA_XT_LIT: Self

pub const VAX_GFLOAT: Self

Object contains G-Float insn.

pub const SPARC_SUN_US1: Self

Sun UltraSPARC1 extensions

pub const ARM_SOFT_FLOAT: Self

pub const ARM_ABI_FLOAT_SOFT: Self

NB conflicts with EF_ARM_SOFT_FLOAT.

pub const AMDGPU_FEATURE_SRAMECC_V3: Self

pub const AMDGPU_FEATURE_XNACK_OFF_V4: Self

pub const FRV_MULADD: Self

-mmuladd

pub const RH850_EP_FIX: Self

r30 is fixed.

pub const MIPS_NAN2008: Self

pub const SPARC_HAL_R1: Self

HAL R1 extensions

pub const ARM_VFP_FLOAT: Self

pub const ARM_ABI_FLOAT_HARD: Self

NB conflicts with EF_ARM_VFP_FLOAT.

pub const AMDGPU_FEATURE_SRAMECC_ANY_V4: Self

pub const FRV_BIGPIC: Self

-fPIC

pub const RH850_EP_NOFIX: Self

r30 is callee save.

pub const SPARC_SUN_US3: Self

Sun UltraSPARCIII extensions

pub const ARM_MAVERICK_FLOAT: Self

pub const AMDGPU_FEATURE_SRAMECC_OFF_V4: Self

pub const FRV_LIBPIC: Self

-mlibrary-pic

pub const RH850_TP_FIX: Self

r5 is fixed.

pub const FRV_G0: Self

-G 0, no small data ptr

pub const RH850_TP_NOFIX: Self

r5 is callee save.

pub const FRV_NOPACK: Self

-mnopack

pub const RH850_REG2_RESERVE: Self

r2 is fixed.

pub const FRV_FDPIC: Self

-mfdpic

pub const RH850_REG2_NORESERVE: Self

r2 is callee saved.

pub const M68K_CFV4E: Self

pub const I370_RELOCATABLE_LIB: Self

i370 -mrelocatable-lib flag

pub const PPC_RELOCATABLE_LIB: Self

PowerPC -mrelocatable-lib flag.

pub const SH_FDPIC: Self

Uses the FDPIC ABI.

pub const FRV_CPU_MASK: Self

specific cpu bits

pub const IA_64_ARCH: Self

Arch. version mask.

pub const MEP_CPU_MASK: Self

specific cpu bits

pub const ARM_EABIMASK: Self

pub const FRV_CPU_GENERIC: Self

generic FRV

pub const MEP_CPU_MEP: Self

generic MEP

pub const MEP_COP_NONE: Self

pub const ARM_EABI_UNKNOWN: Self

pub const NIOS2_ARCH_R1: Self

pub const CRIS_VARIANT_ANY_V0_V10: Self

pub const MIPS_ARCH_1: Self

-mips1 code.

pub const RISCV_FLOAT_ABI_SOFT: Self

pub const IA_64_VMS_COMCOD_SUCCESS: Self

pub const NDS32_ELF_VERSION_SHIFT: Self

pub const SH_UNKNOWN: Self

For backwards compatibility.

pub const M68HC11_GENERIC: Self

Generic 68HC12/backward compatibility.

pub const SPARCV9_TSO: Self

total store ordering

pub const AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4: Self

pub const AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4: Self

pub const FRV_CPU_FR500: Self

FRV500

pub const M68K_M68000: Self

pub const MEP_CPU_C2: Self

MEP c2

pub const ARM_EABI_VER1: Self

pub const IA_64_ARCHVER_1: Self

Arch. version level 1 compat.

pub const FRV_CPU_FR300: Self

FRV300

pub const M68K_FIDO: Self

pub const MIPS_ARCH_ASE_MICROMIPS: Self

pub const MEP_CPU_C3: Self

MEP c3

pub const ARM_EABI_VER2: Self

pub const FRV_CPU_SIMPLE: Self

SIMPLE

pub const ARM_EABI_VER3: Self

pub const FRV_CPU_TOMCAT: Self

Tomcat, FR500 prototype

pub const MIPS_ARCH_ASE_M16: Self

pub const MEP_CPU_C4: Self

MEP c4

pub const ARM_EABI_VER4: Self

pub const FRV_CPU_FR400: Self

FRV400

pub const ARM_EABI_VER5: Self

pub const FRV_CPU_FR550: Self

FRV550

pub const FRV_CPU_FR405: Self

pub const FRV_CPU_FR450: Self

pub const MIPS_ARCH_ASE_MDMX: Self

pub const MEP_CPU_C5: Self

MEP c5

pub const FRV_PIC_FLAGS: Self

pub const FRV_ALL_FLAGS: Self

pub const MN10300_MACH: Self

pub const MIPS_MACH: Self

pub const H8_MACH: Self

pub const MEP_COP_MASK: Self

pub const V850_ARCH: Self

pub const MIPS_ARCH: Self

pub const RH850_ABI: Self

pub const NDS_ARCH: Self

pub const CSKY_ABIMASK: Self

pub const V800_850E3: Self

pub const PARISC_NO_KABP: Self

pub const RISCV_FLOAT_ABI: Self

pub const RISCV_FLOAT_ABI_QUAD: Self

pub const M68K_CF_ISA_C: Self

pub const Z80_MACH_Z80N: Self

pub const SH4AL_DSP: Self

pub const ARC_CPU_ARCV2HS: Self

pub const M68K_CPU32: Self

pub const CPU32: Self

pub const M68K_ARCH_MASK: Self

pub const M68K_CF_ISA_B: Self

pub const Z80_MACH_GBZ80: Self

pub const SH3_DSP: Self

pub const ARC_CPU_ARCV2EM: Self

pub const M68K_CF_ISA_C_NODIV: Self

ISA C except for div

pub const LOONGARCH_ABI_MODIFIER_MASK: Self

pub const M68K_CF_MASK: Self

pub const MEP_INDEX_MASK: Self

Configuration index

pub const ARC_MACH_MSK: Self

pub const MSP430_MACH: Self

pub const Z80_MACH_MSK: Self

pub const AMDGPU_MACH: Self

pub const I370_RELOCATABLE: Self

i370 -mrelocatable flag

pub const PARISC_TRAPNIL: Self

pub const PPC_RELOCATABLE: Self

PowerPC -mrelocatable flag.

pub const MEP_COP_AVC: Self

pub const SCORE_MACH: Self

pub const OMIT_PIC_FIXDD: Self

pub const M32R_INST: Self

pub const CSKY_OTHER: Self

pub const SCORE_PIC: Self

pub const PPC_EMB: Self

PowerPC embedded flag.

pub const MIPS_ARCH_64R2: Self

MIPS64r2 code.

pub const SCORE_FIXDEP: Self

pub const MIPS_ARCH_5: Self

-mips5 code.

pub const PARISC_EXT: Self

pub const MEP_COP_AVC2: Self

pub const PARISC_LSB: Self

pub const PARISC_WIDE: Self

pub const PARISC_LAZYSWAP: Self

pub const ARM_LE8: Self

pub const PARISC_ARCH: Self

pub const CSKY_PROCESSOR: Self

pub const M32R_ARCH: Self

pub const MIPS_ARCH_4: Self

-mips4 code.

pub const MIPS_ARCH_ASE: Self

pub const MIPS_ABI: Self

pub const MEP_CPU_H1: Self

MEP h1

pub const MIPS_ARCH_2: Self

-mips2 code.

pub const CSKY_ABIV1: Self

pub const MEP_COP_FMAX: Self

pub const MEP_COP_IVC2: Self

pub const MEP_ALL_FLAGS: Self

pub const RL78_CPU_RL78: Self

FIXME: correct value?

pub const RX_CPU_RX: Self

FIXME: this collides with the E_FLAG_RX_… values below.

pub const RL78_CPU_MASK: Self

specific cpu bits.

pub const M32C_CPU_MASK: Self

specific cpu bits

pub const RL78_ALL_FLAGS: Self

pub const AVR_MACH: Self

pub const M32C_ALL_FLAGS: Self

pub const Z80_MACH_EZ80_ADL: Self

pub const SPARC_32PLUS_MASK: Self

bits indicating V8+ type

pub const SPARC_EXT_MASK: Self

reserved for vendor extensions

pub const SPARC_LEDATA: Self

little endian data

pub const ARM_BE8: Self

pub const LOONGARCH_OBJABI_MASK: Self

pub const LOONGARCH_ABI_MASK: Self

pub const M32C_CPU_M16C: Self

default

pub const M32C_CPU_M32C: Self

m32c

pub const NDS_ARCH_SHIFT: Self

pub const NDS_INST: Self

pub const SH_MACH_MASK: Self

pub const SH4: Self

pub const SH2E: Self

pub const SH2A: Self

pub const SH4A_NOFPU: Self

pub const SH4_NOMMU_NOFPU: Self

pub const SH2A_NOFPU: Self

pub const SH3_NOMMU: Self

pub const SH2A_SH4_NOFPU: Self

pub const SH2A_SH3_NOFPU: Self

pub const SH2A_SH4: Self

pub const SH2A_SH3E: Self

pub const SH5: Self

pub const ARC_OSABI_MSK: Self

pub const ARC_ALL_MSK: Self

pub const RX_CPU_MASK: Self

specific cpu bits.

pub const RX_ALL_FLAGS: Self

pub const AMDGPU_MACH_AMDGCN_GFX601: Self

pub const AMDGPU_MACH_AMDGCN_GFX700: Self

pub const AMDGPU_MACH_AMDGCN_GFX701: Self

pub const AMDGPU_MACH_AMDGCN_GFX702: Self

pub const AMDGPU_MACH_AMDGCN_GFX703: Self

pub const AMDGPU_MACH_AMDGCN_GFX704: Self

pub const AMDGPU_MACH_AMDGCN_GFX801: Self

pub const AMDGPU_MACH_AMDGCN_GFX802: Self

pub const AMDGPU_MACH_AMDGCN_GFX803: Self

pub const AMDGPU_MACH_AMDGCN_GFX810: Self

pub const AMDGPU_MACH_AMDGCN_GFX900: Self

pub const AMDGPU_MACH_AMDGCN_GFX902: Self

pub const AMDGPU_MACH_AMDGCN_GFX904: Self

pub const AMDGPU_MACH_AMDGCN_GFX906: Self

pub const AMDGPU_MACH_AMDGCN_GFX909: Self

pub const AMDGPU_MACH_AMDGCN_GFX90C: Self

pub const AMDGPU_MACH_AMDGCN_GFX1010: Self

pub const AMDGPU_MACH_AMDGCN_GFX1011: Self

pub const AMDGPU_MACH_AMDGCN_GFX1012: Self

pub const AMDGPU_MACH_AMDGCN_GFX1030: Self

pub const AMDGPU_MACH_AMDGCN_GFX1031: Self

pub const AMDGPU_MACH_AMDGCN_GFX1032: Self

pub const AMDGPU_MACH_AMDGCN_GFX1033: Self

pub const AMDGPU_MACH_AMDGCN_GFX602: Self

pub const AMDGPU_MACH_AMDGCN_GFX705: Self

pub const AMDGPU_MACH_AMDGCN_GFX805: Self

pub const AMDGPU_MACH_AMDGCN_GFX1035: Self

pub const AMDGPU_MACH_AMDGCN_GFX1034: Self

pub const AMDGPU_MACH_AMDGCN_GFX90A: Self

pub const AMDGPU_MACH_AMDGCN_GFX1013: Self

pub const AMDGPU_MACH_AMDGCN_GFX1036: Self

pub const AMDGPU_FEATURE_XNACK_V4: Self

pub const AMDGPU_FEATURE_XNACK_ON_V4: Self

pub const AMDGPU_FEATURE_SRAMECC_V4: Self

pub const AMDGPU_FEATURE_SRAMECC_ON_V4: Self

pub const CRIS_VARIANT_MASK: Self

pub const MIPS_ARCH_3: Self

-mips3 code.

pub const CSKY_ABIV2: Self

pub const MIPS_ARCH_32: Self

MIPS32 code.

pub const MIPS_ARCH_64: Self

MIPS64 code.

pub const MIPS_ARCH_32R2: Self

MIPS32r2 code.

impl ElfFlags

pub const fn empty() -> Self

Get a flags value with all bits unset.

pub const fn all() -> Self

Get a flags value with all known bits set.

pub const fn bits(&self) -> u32

Get the underlying bits value.

The returned value is exactly the bits set in this flags value.

pub const fn from_bits(bits: u32) -> Option<Self>

Convert from a bits value.

This method will return None if any unknown bits are set.

pub const fn from_bits_truncate(bits: u32) -> Self

Convert from a bits value, unsetting any unknown bits.

pub const fn from_bits_retain(bits: u32) -> Self

Convert from a bits value exactly.

pub fn from_name(name: &str) -> Option<Self>

Get a flags value with the bits of a flag with the given name set.

This method will return None if name is empty or doesn’t correspond to any named flag.

pub const fn is_empty(&self) -> bool

Whether all bits in this flags value are unset.

pub const fn is_all(&self) -> bool

Whether all known bits in this flags value are set.

pub const fn intersects(&self, other: Self) -> bool

Whether any set bits in a source flags value are also set in a target flags value.

pub const fn contains(&self, other: Self) -> bool

Whether all set bits in a source flags value are also set in a target flags value.

pub fn insert(&mut self, other: Self)

The bitwise or (|) of the bits in two flags values.

pub fn remove(&mut self, other: Self)

The intersection of a source flags value with the complement of a target flags value (&!).

This method is not equivalent to self & !other when other has unknown bits set. remove won’t truncate other, but the ! operator will.

pub fn toggle(&mut self, other: Self)

The bitwise exclusive-or (^) of the bits in two flags values.

pub fn set(&mut self, other: Self, value: bool)

Call insert when value is true or remove when value is false.

pub const fn intersection(self, other: Self) -> Self

The bitwise and (&) of the bits in two flags values.

pub const fn union(self, other: Self) -> Self

The bitwise or (|) of the bits in two flags values.

pub const fn difference(self, other: Self) -> Self

The intersection of a source flags value with the complement of a target flags value (&!).

This method is not equivalent to self & !other when other has unknown bits set. difference won’t truncate other, but the ! operator will.

pub const fn symmetric_difference(self, other: Self) -> Self

The bitwise exclusive-or (^) of the bits in two flags values.

pub const fn complement(self) -> Self

The bitwise negation (!) of the bits in a flags value, truncating the result.

impl ElfFlags

pub const fn iter(&self) -> Iter<ElfFlags>

Yield a set of contained flags values.

Each yielded flags value will correspond to a defined named flag. Any unknown bits will be yielded together as a final flags value.

pub const fn iter_names(&self) -> IterNames<ElfFlags>

Yield a set of contained named flags values.

This method is like iter, except only yields bits in contained named flags. Any unknown bits, or bits not corresponding to a contained flag will not be yielded.

Trait Implementations

impl Binary for ElfFlags

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl BinarySerde for ElfFlags

where <ElfFlags as Flags>::Bits: BinarySerde,

const SERIALIZED_SIZE: usize = 4usize

the size of this type when serialized to a packed binary format.

type RecursiveArray = <<ElfFlags as Flags>::Bits as BinarySerde>::RecursiveArray

the fixed size recursive array type that is returned when serializing this type to an array. the length of this array is guaranteed to be equal to Self::SERIALIZED_SIZE.

fn binary_serialize(&self, buf: &mut [u8], endianness: Endianness)

serialize this value into the given buffer using the given endianness.

fn binary_deserialize( buf: &[u8], endianness: Endianness, ) -> Result<Self, DeserializeError>

deserializes the given buffer using the given endianness into a value of this type.

fn binary_serialize_to_array( &self, endianness: Endianness, ) -> Self::RecursiveArray

serialize this value to a fixed size array using the given endianness.

impl BitAnd for ElfFlags

fn bitand(self, other: Self) -> Self

The bitwise and (&) of the bits in two flags values.

type Output = ElfFlags

The resulting type after applying the & operator.

impl BitAndAssign for ElfFlags

fn bitand_assign(&mut self, other: Self)

The bitwise and (&) of the bits in two flags values.

impl BitOr for ElfFlags

fn bitor(self, other: ElfFlags) -> Self

The bitwise or (|) of the bits in two flags values.

type Output = ElfFlags

The resulting type after applying the | operator.

impl BitOrAssign for ElfFlags

fn bitor_assign(&mut self, other: Self)

The bitwise or (|) of the bits in two flags values.

impl BitXor for ElfFlags

fn bitxor(self, other: Self) -> Self

The bitwise exclusive-or (^) of the bits in two flags values.

type Output = ElfFlags

The resulting type after applying the ^ operator.

impl BitXorAssign for ElfFlags

fn bitxor_assign(&mut self, other: Self)

The bitwise exclusive-or (^) of the bits in two flags values.

impl Clone for ElfFlags

fn clone(&self) -> ElfFlags

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for ElfFlags

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Extend<ElfFlags> for ElfFlags

fn extend<T: IntoIterator<Item = Self>>(&mut self, iterator: T)

The bitwise or (|) of the bits in each flags value.

fn extend_one(&mut self, item: A)

🔬This is a nightly-only experimental API. (extend_one)

Extends a collection with exactly one element.

fn extend_reserve(&mut self, additional: usize)

🔬This is a nightly-only experimental API. (extend_one)

Reserves capacity in a collection for the given number of additional elements.

impl Flags for ElfFlags

const FLAGS: &'static [Flag<ElfFlags>]

The set of defined flags.

type Bits = u32

The underlying bits type.

fn bits(&self) -> u32

Get the underlying bits value.

fn from_bits_retain(bits: u32) -> ElfFlags

Convert from a bits value exactly.

fn empty() -> Self

Get a flags value with all bits unset.

fn all() -> Self

Get a flags value with all known bits set.

fn contains_unknown_bits(&self) -> bool

This method will return true if any unknown bits are set.

fn from_bits(bits: Self::Bits) -> Option<Self>

Convert from a bits value.

fn from_bits_truncate(bits: Self::Bits) -> Self

Convert from a bits value, unsetting any unknown bits.

fn from_name(name: &str) -> Option<Self>

Get a flags value with the bits of a flag with the given name set.

fn iter(&self) -> Iter<Self>

Yield a set of contained flags values.

fn iter_names(&self) -> IterNames<Self>

Yield a set of contained named flags values.

fn iter_defined_names() -> IterDefinedNames<Self>

Yield a set of all named flags defined by Self::FLAGS.

fn is_empty(&self) -> bool

Whether all bits in this flags value are unset.

fn is_all(&self) -> bool

Whether all known bits in this flags value are set.

fn intersects(&self, other: Self) -> bool

where Self: Sized,

Whether any set bits in a source flags value are also set in a target flags value.

fn contains(&self, other: Self) -> bool

where Self: Sized,

Whether all set bits in a source flags value are also set in a target flags value.

fn truncate(&mut self)

where Self: Sized,

Remove any unknown bits from the flags.

fn insert(&mut self, other: Self)

where Self: Sized,

The bitwise or (|) of the bits in two flags values.

fn remove(&mut self, other: Self)

where Self: Sized,

The intersection of a source flags value with the complement of a target flags value (&!).

fn toggle(&mut self, other: Self)

where Self: Sized,

The bitwise exclusive-or (^) of the bits in two flags values.

fn set(&mut self, other: Self, value: bool)

where Self: Sized,

Call Flags::insert when value is true or Flags::remove when value is false.

fn clear(&mut self)

where Self: Sized,

Unsets all bits in the flags.

fn intersection(self, other: Self) -> Self

The bitwise and (&) of the bits in two flags values.

fn union(self, other: Self) -> Self

The bitwise or (|) of the bits in two flags values.

fn difference(self, other: Self) -> Self

The intersection of a source flags value with the complement of a target flags value (&!).

fn symmetric_difference(self, other: Self) -> Self

The bitwise exclusive-or (^) of the bits in two flags values.

fn complement(self) -> Self

The bitwise negation (!) of the bits in a flags value, truncating the result.

impl FromIterator<ElfFlags> for ElfFlags

fn from_iter<T: IntoIterator<Item = Self>>(iterator: T) -> Self

The bitwise or (|) of the bits in each flags value.

impl Hash for ElfFlags

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl IntoIterator for ElfFlags

type Item = ElfFlags

The type of the elements being iterated over.

type IntoIter = Iter<ElfFlags>

Which kind of iterator are we turning this into?

fn into_iter(self) -> Self::IntoIter

Creates an iterator from a value.

impl LowerHex for ElfFlags

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Not for ElfFlags

fn not(self) -> Self

The bitwise negation (!) of the bits in a flags value, truncating the result.

type Output = ElfFlags

The resulting type after applying the ! operator.

impl Octal for ElfFlags

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for ElfFlags

fn eq(&self, other: &ElfFlags) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PublicFlags for ElfFlags

type Primitive = u32

The type of the underlying storage.

type Internal = InternalBitFlags

The type of the internal field on the generated flags type.

impl Sub for ElfFlags

fn sub(self, other: Self) -> Self

The intersection of a source flags value with the complement of a target flags value (&!).

This method is not equivalent to self & !other when other has unknown bits set. difference won’t truncate other, but the ! operator will.

type Output = ElfFlags

The resulting type after applying the - operator.

impl SubAssign for ElfFlags

fn sub_assign(&mut self, other: Self)

The intersection of a source flags value with the complement of a target flags value (&!).

This method is not equivalent to self & !other when other has unknown bits set. difference won’t truncate other, but the ! operator will.

impl UpperHex for ElfFlags

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Copy for ElfFlags

impl Eq for ElfFlags

impl StructuralPartialEq for ElfFlags