efm32tg232_pac/msc/
writecmd.rs

1#[doc = "Register `WRITECMD` writer"]
2pub struct W(crate::W<WRITECMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<WRITECMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<WRITECMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<WRITECMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `LADDRIM` writer - Load MSC_ADDRB into ADDR"]
23pub type LADDRIM_W<'a> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, 0>;
24#[doc = "Field `ERASEPAGE` writer - Erase Page"]
25pub type ERASEPAGE_W<'a> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, 1>;
26#[doc = "Field `WRITEEND` writer - End Write Mode"]
27pub type WRITEEND_W<'a> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, 2>;
28#[doc = "Field `WRITEONCE` writer - Word Write-Once Trigger"]
29pub type WRITEONCE_W<'a> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, 3>;
30#[doc = "Field `WRITETRIG` writer - Word Write Sequence Trigger"]
31pub type WRITETRIG_W<'a> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, 4>;
32#[doc = "Field `ERASEABORT` writer - Abort erase sequence"]
33pub type ERASEABORT_W<'a> = crate::BitWriter<'a, u32, WRITECMD_SPEC, bool, 5>;
34impl W {
35    #[doc = "Bit 0 - Load MSC_ADDRB into ADDR"]
36    #[inline(always)]
37    pub fn laddrim(&mut self) -> LADDRIM_W {
38        LADDRIM_W::new(self)
39    }
40    #[doc = "Bit 1 - Erase Page"]
41    #[inline(always)]
42    pub fn erasepage(&mut self) -> ERASEPAGE_W {
43        ERASEPAGE_W::new(self)
44    }
45    #[doc = "Bit 2 - End Write Mode"]
46    #[inline(always)]
47    pub fn writeend(&mut self) -> WRITEEND_W {
48        WRITEEND_W::new(self)
49    }
50    #[doc = "Bit 3 - Word Write-Once Trigger"]
51    #[inline(always)]
52    pub fn writeonce(&mut self) -> WRITEONCE_W {
53        WRITEONCE_W::new(self)
54    }
55    #[doc = "Bit 4 - Word Write Sequence Trigger"]
56    #[inline(always)]
57    pub fn writetrig(&mut self) -> WRITETRIG_W {
58        WRITETRIG_W::new(self)
59    }
60    #[doc = "Bit 5 - Abort erase sequence"]
61    #[inline(always)]
62    pub fn eraseabort(&mut self) -> ERASEABORT_W {
63        ERASEABORT_W::new(self)
64    }
65    #[doc = "Writes raw bits to the register."]
66    #[inline(always)]
67    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
68        self.0.bits(bits);
69        self
70    }
71}
72#[doc = "Write Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writecmd](index.html) module"]
73pub struct WRITECMD_SPEC;
74impl crate::RegisterSpec for WRITECMD_SPEC {
75    type Ux = u32;
76}
77#[doc = "`write(|w| ..)` method takes [writecmd::W](W) writer structure"]
78impl crate::Writable for WRITECMD_SPEC {
79    type Writer = W;
80}
81#[doc = "`reset()` method sets WRITECMD to value 0"]
82impl crate::Resettable for WRITECMD_SPEC {
83    #[inline(always)]
84    fn reset_value() -> Self::Ux {
85        0
86    }
87}
efm32tg232_pac/msc/writecmd.rs

efm32tg232_pac/msc/
writecmd.rs
