Module efm32tg11b340_pac::ldma::ch0_ctrl
source · [−]Expand description
Channel Descriptor Control Word Register
Structs
Channel Descriptor Control Word Register
Register CH0_CTRL reader
Register CH0_CTRL writer
Enums
Block Transfer Size
Destination Address Increment Size
Unit Data Transfer Size
Source Address Increment Size
DMA Structure Type
Type Definitions
Field BLOCKSIZE reader - Block Transfer Size
Field BLOCKSIZE writer - Block Transfer Size
Field BYTESWAP reader - Endian Byte Swap
Field BYTESWAP writer - Endian Byte Swap
Field DECLOOPCNT reader - Decrement Loop Count
Field DECLOOPCNT writer - Decrement Loop Count
Field DONEIFSEN reader - DMA Operation Done Interrupt Flag Set Enable
Field DONEIFSEN writer - DMA Operation Done Interrupt Flag Set Enable
Field DSTINC reader - Destination Address Increment Size
Field DSTINC writer - Destination Address Increment Size
Field DSTMODE reader - Destination Addressing Mode
Field IGNORESREQ reader - Ignore Sreq
Field IGNORESREQ writer - Ignore Sreq
Field REQMODE reader - DMA Request Transfer Mode Select
Field REQMODE writer - DMA Request Transfer Mode Select
Field SIZE reader - Unit Data Transfer Size
Field SIZE writer - Unit Data Transfer Size
Field SRCINC reader - Source Address Increment Size
Field SRCINC writer - Source Address Increment Size
Field SRCMODE reader - Source Addressing Mode
Field STRUCTREQ writer - Structure DMA Transfer Request
Field STRUCTTYPE reader - DMA Structure Type
Field XFERCNT reader - DMA Unit Data Transfer Count
Field XFERCNT writer - DMA Unit Data Transfer Count