efm32pg22_pac/efm32pg22c200/emu_ns/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `EM4UNLATCH` writer - EM4 unlatch"]
23pub type EM4UNLATCH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
24#[doc = "Field `TEMPAVGREQ` writer - Temperature Average Request"]
25pub type TEMPAVGREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
26#[doc = "Field `EM01VSCALE1` writer - Scale voltage to Vscale1"]
27pub type EM01VSCALE1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
28#[doc = "Field `EM01VSCALE2` writer - Scale voltage to Vscale2"]
29pub type EM01VSCALE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
30#[doc = "Field `RSTCAUSECLR` writer - Reset Cause Clear"]
31pub type RSTCAUSECLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
32impl W {
33    #[doc = "Bit 1 - EM4 unlatch"]
34    #[inline(always)]
35    #[must_use]
36    pub fn em4unlatch(&mut self) -> EM4UNLATCH_W<1> {
37        EM4UNLATCH_W::new(self)
38    }
39    #[doc = "Bit 4 - Temperature Average Request"]
40    #[inline(always)]
41    #[must_use]
42    pub fn tempavgreq(&mut self) -> TEMPAVGREQ_W<4> {
43        TEMPAVGREQ_W::new(self)
44    }
45    #[doc = "Bit 10 - Scale voltage to Vscale1"]
46    #[inline(always)]
47    #[must_use]
48    pub fn em01vscale1(&mut self) -> EM01VSCALE1_W<10> {
49        EM01VSCALE1_W::new(self)
50    }
51    #[doc = "Bit 11 - Scale voltage to Vscale2"]
52    #[inline(always)]
53    #[must_use]
54    pub fn em01vscale2(&mut self) -> EM01VSCALE2_W<11> {
55        EM01VSCALE2_W::new(self)
56    }
57    #[doc = "Bit 17 - Reset Cause Clear"]
58    #[inline(always)]
59    #[must_use]
60    pub fn rstcauseclr(&mut self) -> RSTCAUSECLR_W<17> {
61        RSTCAUSECLR_W::new(self)
62    }
63    #[doc = "Writes raw bits to the register."]
64    #[inline(always)]
65    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
66        self.0.bits(bits);
67        self
68    }
69}
70#[doc = "No Description\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
71pub struct CMD_SPEC;
72impl crate::RegisterSpec for CMD_SPEC {
73    type Ux = u32;
74}
75#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
76impl crate::Writable for CMD_SPEC {
77    type Writer = W;
78    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
79    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
80}
81#[doc = "`reset()` method sets CMD to value 0"]
82impl crate::Resettable for CMD_SPEC {
83    const RESET_VALUE: Self::Ux = 0;
84}
efm32pg22_pac/efm32pg22c200/emu_ns/cmd.rs

efm32pg22_pac/efm32pg22c200/emu_ns/
cmd.rs
