Module efm32pg1b_pac::usart1
source · Expand description
USART1
Modules§
- Clock Control Register
- Command Register
- Control Register
- Control Register Extended
- USART Frame Format Register
- I2S Control Register
- Interrupt Enable Register
- Interrupt Flag Register
- Interrupt Flag Clear Register
- Interrupt Flag Set Register
- USART Input Register
- IrDA Control Register
- I/O Routing Location Register
- I/O Routing Location Register
- I/O Routing Pin Enable Register
- RX Buffer Data Register
- RX Buffer Data Extended Register
- RX Buffer Data Extended Peek Register
- RX FIFO Double Data Register
- RX Buffer Double Data Extended Register
- RX Buffer Double Data Extended Peek Register
- USART Status Register
- Used to Generate Interrupts and Various Delays
- Used to Generate Interrupts and Various Delays
- Used to Generate Interrupts and Various Delays
- Timing Register
- USART Trigger Control Register
- TX Buffer Data Register
- TX Buffer Data Extended Register
- TX Buffer Double Data Register
- TX Buffer Double Data Extended Register
Structs§
- Register block
Type Aliases§
- CLKDIV (rw) register accessor: Clock Control Register
- CMD (w) register accessor: Command Register
- CTRL (rw) register accessor: Control Register
- CTRLX (rw) register accessor: Control Register Extended
- FRAME (rw) register accessor: USART Frame Format Register
- I2SCTRL (rw) register accessor: I2S Control Register
- IEN (rw) register accessor: Interrupt Enable Register
- IF (r) register accessor: Interrupt Flag Register
- IFC (w) register accessor: Interrupt Flag Clear Register
- IFS (w) register accessor: Interrupt Flag Set Register
- INPUT (rw) register accessor: USART Input Register
- IRCTRL (rw) register accessor: IrDA Control Register
- ROUTELOC0 (rw) register accessor: I/O Routing Location Register
- ROUTELOC1 (rw) register accessor: I/O Routing Location Register
- ROUTEPEN (rw) register accessor: I/O Routing Pin Enable Register
- RXDATA (r) register accessor: RX Buffer Data Register
- RXDATAX (r) register accessor: RX Buffer Data Extended Register
- RXDATAXP (r) register accessor: RX Buffer Data Extended Peek Register
- RXDOUBLE (r) register accessor: RX FIFO Double Data Register
- RXDOUBLEX (r) register accessor: RX Buffer Double Data Extended Register
- RXDOUBLEXP (r) register accessor: RX Buffer Double Data Extended Peek Register
- STATUS (r) register accessor: USART Status Register
- TIMECMP0 (rw) register accessor: Used to Generate Interrupts and Various Delays
- TIMECMP1 (rw) register accessor: Used to Generate Interrupts and Various Delays
- TIMECMP2 (rw) register accessor: Used to Generate Interrupts and Various Delays
- TIMING (rw) register accessor: Timing Register
- TRIGCTRL (rw) register accessor: USART Trigger Control Register
- TXDATA (rw) register accessor: TX Buffer Data Register
- TXDATAX (rw) register accessor: TX Buffer Data Extended Register
- TXDOUBLE (rw) register accessor: TX Buffer Double Data Register
- TXDOUBLEX (rw) register accessor: TX Buffer Double Data Extended Register