1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475
#[doc = "Reader of register HFXOCTRL"] pub type R = crate::R<u32, super::HFXOCTRL>; #[doc = "Writer for register HFXOCTRL"] pub type W = crate::W<u32, super::HFXOCTRL>; #[doc = "Register HFXOCTRL `reset()`'s with value 0"] impl crate::ResetValue for super::HFXOCTRL { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `MODE`"] pub type MODE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MODE`"] pub struct MODE_W<'a> { w: &'a mut W, } impl<'a> MODE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "HFXO Automatic Peak Detection and Shunt Current Optimization Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum PEAKDETSHUNTOPTMODE_A { #[doc = "0: Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used."] AUTOCMD, #[doc = "1: CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences."] CMD, #[doc = "2: CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."] MANUAL, } impl From<PEAKDETSHUNTOPTMODE_A> for u8 { #[inline(always)] fn from(variant: PEAKDETSHUNTOPTMODE_A) -> Self { match variant { PEAKDETSHUNTOPTMODE_A::AUTOCMD => 0, PEAKDETSHUNTOPTMODE_A::CMD => 1, PEAKDETSHUNTOPTMODE_A::MANUAL => 2, } } } #[doc = "Reader of field `PEAKDETSHUNTOPTMODE`"] pub type PEAKDETSHUNTOPTMODE_R = crate::R<u8, PEAKDETSHUNTOPTMODE_A>; impl PEAKDETSHUNTOPTMODE_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, PEAKDETSHUNTOPTMODE_A> { use crate::Variant::*; match self.bits { 0 => Val(PEAKDETSHUNTOPTMODE_A::AUTOCMD), 1 => Val(PEAKDETSHUNTOPTMODE_A::CMD), 2 => Val(PEAKDETSHUNTOPTMODE_A::MANUAL), i => Res(i), } } #[doc = "Checks if the value of the field is `AUTOCMD`"] #[inline(always)] pub fn is_autocmd(&self) -> bool { *self == PEAKDETSHUNTOPTMODE_A::AUTOCMD } #[doc = "Checks if the value of the field is `CMD`"] #[inline(always)] pub fn is_cmd(&self) -> bool { *self == PEAKDETSHUNTOPTMODE_A::CMD } #[doc = "Checks if the value of the field is `MANUAL`"] #[inline(always)] pub fn is_manual(&self) -> bool { *self == PEAKDETSHUNTOPTMODE_A::MANUAL } } #[doc = "Write proxy for field `PEAKDETSHUNTOPTMODE`"] pub struct PEAKDETSHUNTOPTMODE_W<'a> { w: &'a mut W, } impl<'a> PEAKDETSHUNTOPTMODE_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: PEAKDETSHUNTOPTMODE_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used."] #[inline(always)] pub fn autocmd(self) -> &'a mut W { self.variant(PEAKDETSHUNTOPTMODE_A::AUTOCMD) } #[doc = "CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences."] #[inline(always)] pub fn cmd(self) -> &'a mut W { self.variant(PEAKDETSHUNTOPTMODE_A::CMD) } #[doc = "CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."] #[inline(always)] pub fn manual(self) -> &'a mut W { self.variant(PEAKDETSHUNTOPTMODE_A::MANUAL) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4); self.w } } #[doc = "Reader of field `LOWPOWER`"] pub type LOWPOWER_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LOWPOWER`"] pub struct LOWPOWER_W<'a> { w: &'a mut W, } impl<'a> LOWPOWER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `XTI2GND`"] pub type XTI2GND_R = crate::R<bool, bool>; #[doc = "Write proxy for field `XTI2GND`"] pub struct XTI2GND_W<'a> { w: &'a mut W, } impl<'a> XTI2GND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `XTO2GND`"] pub type XTO2GND_R = crate::R<bool, bool>; #[doc = "Write proxy for field `XTO2GND`"] pub struct XTO2GND_W<'a> { w: &'a mut W, } impl<'a> XTO2GND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "HFXO Low Frequency Timeout\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum LFTIMEOUT_A { #[doc = "0: Timeout period of 0 cycles (disabled)"] _0CYCLES, #[doc = "1: Timeout period of 2 cycles"] _2CYCLES, #[doc = "2: Timeout period of 4 cycles"] _4CYCLES, #[doc = "3: Timeout period of 16 cycles"] _16CYCLES, #[doc = "4: Timeout period of 32 cycles"] _32CYCLES, #[doc = "5: Timeout period of 64 cycles"] _64CYCLES, #[doc = "6: Timeout period of 1024 cycles"] _1KCYCLES, #[doc = "7: Timeout period of 4096 cycles"] _4KCYCLES, } impl From<LFTIMEOUT_A> for u8 { #[inline(always)] fn from(variant: LFTIMEOUT_A) -> Self { match variant { LFTIMEOUT_A::_0CYCLES => 0, LFTIMEOUT_A::_2CYCLES => 1, LFTIMEOUT_A::_4CYCLES => 2, LFTIMEOUT_A::_16CYCLES => 3, LFTIMEOUT_A::_32CYCLES => 4, LFTIMEOUT_A::_64CYCLES => 5, LFTIMEOUT_A::_1KCYCLES => 6, LFTIMEOUT_A::_4KCYCLES => 7, } } } #[doc = "Reader of field `LFTIMEOUT`"] pub type LFTIMEOUT_R = crate::R<u8, LFTIMEOUT_A>; impl LFTIMEOUT_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> LFTIMEOUT_A { match self.bits { 0 => LFTIMEOUT_A::_0CYCLES, 1 => LFTIMEOUT_A::_2CYCLES, 2 => LFTIMEOUT_A::_4CYCLES, 3 => LFTIMEOUT_A::_16CYCLES, 4 => LFTIMEOUT_A::_32CYCLES, 5 => LFTIMEOUT_A::_64CYCLES, 6 => LFTIMEOUT_A::_1KCYCLES, 7 => LFTIMEOUT_A::_4KCYCLES, _ => unreachable!(), } } #[doc = "Checks if the value of the field is `_0CYCLES`"] #[inline(always)] pub fn is_0cycles(&self) -> bool { *self == LFTIMEOUT_A::_0CYCLES } #[doc = "Checks if the value of the field is `_2CYCLES`"] #[inline(always)] pub fn is_2cycles(&self) -> bool { *self == LFTIMEOUT_A::_2CYCLES } #[doc = "Checks if the value of the field is `_4CYCLES`"] #[inline(always)] pub fn is_4cycles(&self) -> bool { *self == LFTIMEOUT_A::_4CYCLES } #[doc = "Checks if the value of the field is `_16CYCLES`"] #[inline(always)] pub fn is_16cycles(&self) -> bool { *self == LFTIMEOUT_A::_16CYCLES } #[doc = "Checks if the value of the field is `_32CYCLES`"] #[inline(always)] pub fn is_32cycles(&self) -> bool { *self == LFTIMEOUT_A::_32CYCLES } #[doc = "Checks if the value of the field is `_64CYCLES`"] #[inline(always)] pub fn is_64cycles(&self) -> bool { *self == LFTIMEOUT_A::_64CYCLES } #[doc = "Checks if the value of the field is `_1KCYCLES`"] #[inline(always)] pub fn is_1kcycles(&self) -> bool { *self == LFTIMEOUT_A::_1KCYCLES } #[doc = "Checks if the value of the field is `_4KCYCLES`"] #[inline(always)] pub fn is_4kcycles(&self) -> bool { *self == LFTIMEOUT_A::_4KCYCLES } } #[doc = "Write proxy for field `LFTIMEOUT`"] pub struct LFTIMEOUT_W<'a> { w: &'a mut W, } impl<'a> LFTIMEOUT_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LFTIMEOUT_A) -> &'a mut W { { self.bits(variant.into()) } } #[doc = "Timeout period of 0 cycles (disabled)"] #[inline(always)] pub fn _0cycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_0CYCLES) } #[doc = "Timeout period of 2 cycles"] #[inline(always)] pub fn _2cycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_2CYCLES) } #[doc = "Timeout period of 4 cycles"] #[inline(always)] pub fn _4cycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_4CYCLES) } #[doc = "Timeout period of 16 cycles"] #[inline(always)] pub fn _16cycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_16CYCLES) } #[doc = "Timeout period of 32 cycles"] #[inline(always)] pub fn _32cycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_32CYCLES) } #[doc = "Timeout period of 64 cycles"] #[inline(always)] pub fn _64cycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_64CYCLES) } #[doc = "Timeout period of 1024 cycles"] #[inline(always)] pub fn _1kcycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_1KCYCLES) } #[doc = "Timeout period of 4096 cycles"] #[inline(always)] pub fn _4kcycles(self) -> &'a mut W { self.variant(LFTIMEOUT_A::_4KCYCLES) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24); self.w } } #[doc = "Reader of field `AUTOSTARTEM0EM1`"] pub type AUTOSTARTEM0EM1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AUTOSTARTEM0EM1`"] pub struct AUTOSTARTEM0EM1_W<'a> { w: &'a mut W, } impl<'a> AUTOSTARTEM0EM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); self.w } } #[doc = "Reader of field `AUTOSTARTSELEM0EM1`"] pub type AUTOSTARTSELEM0EM1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AUTOSTARTSELEM0EM1`"] pub struct AUTOSTARTSELEM0EM1_W<'a> { w: &'a mut W, } impl<'a> AUTOSTARTSELEM0EM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } impl R { #[doc = "Bit 0 - HFXO Mode"] #[inline(always)] pub fn mode(&self) -> MODE_R { MODE_R::new((self.bits & 0x01) != 0) } #[doc = "Bits 4:5 - HFXO Automatic Peak Detection and Shunt Current Optimization Mode"] #[inline(always)] pub fn peakdetshuntoptmode(&self) -> PEAKDETSHUNTOPTMODE_R { PEAKDETSHUNTOPTMODE_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bit 8 - Low Power Mode Control"] #[inline(always)] pub fn lowpower(&self) -> LOWPOWER_R { LOWPOWER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off"] #[inline(always)] pub fn xti2gnd(&self) -> XTI2GND_R { XTI2GND_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off"] #[inline(always)] pub fn xto2gnd(&self) -> XTO2GND_R { XTO2GND_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"] #[inline(always)] pub fn lftimeout(&self) -> LFTIMEOUT_R { LFTIMEOUT_R::new(((self.bits >> 24) & 0x07) as u8) } #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"] #[inline(always)] pub fn autostartem0em1(&self) -> AUTOSTARTEM0EM1_R { AUTOSTARTEM0EM1_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"] #[inline(always)] pub fn autostartselem0em1(&self) -> AUTOSTARTSELEM0EM1_R { AUTOSTARTSELEM0EM1_R::new(((self.bits >> 29) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - HFXO Mode"] #[inline(always)] pub fn mode(&mut self) -> MODE_W { MODE_W { w: self } } #[doc = "Bits 4:5 - HFXO Automatic Peak Detection and Shunt Current Optimization Mode"] #[inline(always)] pub fn peakdetshuntoptmode(&mut self) -> PEAKDETSHUNTOPTMODE_W { PEAKDETSHUNTOPTMODE_W { w: self } } #[doc = "Bit 8 - Low Power Mode Control"] #[inline(always)] pub fn lowpower(&mut self) -> LOWPOWER_W { LOWPOWER_W { w: self } } #[doc = "Bit 9 - Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off"] #[inline(always)] pub fn xti2gnd(&mut self) -> XTI2GND_W { XTI2GND_W { w: self } } #[doc = "Bit 10 - Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off"] #[inline(always)] pub fn xto2gnd(&mut self) -> XTO2GND_W { XTO2GND_W { w: self } } #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"] #[inline(always)] pub fn lftimeout(&mut self) -> LFTIMEOUT_W { LFTIMEOUT_W { w: self } } #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"] #[inline(always)] pub fn autostartem0em1(&mut self) -> AUTOSTARTEM0EM1_W { AUTOSTARTEM0EM1_W { w: self } } #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"] #[inline(always)] pub fn autostartselem0em1(&mut self) -> AUTOSTARTSELEM0EM1_W { AUTOSTARTSELEM0EM1_W { w: self } } }