Module efm32gg995_pac::prs::ch1_ctrl

source · [−]
Expand description

Channel Control Register

Structs

CH1_CTRL_SPEC

Channel Control Register

R

Register CH1_CTRL reader

W

Register CH1_CTRL writer

Enums

EDSEL_A

Edge Detect Select

SOURCESEL_A

Source Select

Type Definitions

ASYNC_R

Field ASYNC reader - Asynchronous reflex

ASYNC_W

Field ASYNC writer - Asynchronous reflex

EDSEL_R

Field EDSEL reader - Edge Detect Select

EDSEL_W

Field EDSEL writer - Edge Detect Select

SIGSEL_R

Field SIGSEL reader - Signal Select

SIGSEL_W

Field SIGSEL writer - Signal Select

SOURCESEL_R

Field SOURCESEL reader - Source Select

SOURCESEL_W

Field SOURCESEL writer - Source Select