Module efm32gg940_pac::dac0::ch1ctrl

source · [−]
Expand description

Channel 1 Control Register

Structs

CH1CTRL_SPEC

Channel 1 Control Register

R

Register CH1CTRL reader

W

Register CH1CTRL writer

Enums

PRSSEL_A

Channel 1 PRS Trigger Select

Type Definitions

EN_R

Field EN reader - Channel 1 Enable

EN_W

Field EN writer - Channel 1 Enable

PRSEN_R

Field PRSEN reader - Channel 1 PRS Trigger Enable

PRSEN_W

Field PRSEN writer - Channel 1 PRS Trigger Enable

PRSSEL_R

Field PRSSEL reader - Channel 1 PRS Trigger Select

PRSSEL_W

Field PRSSEL writer - Channel 1 PRS Trigger Select

REFREN_R

Field REFREN reader - Channel 1 Automatic Refresh Enable

REFREN_W

Field REFREN writer - Channel 1 Automatic Refresh Enable