efm32gg12b830_pac/usb/
dattrim1.rs1#[doc = "Register `DATTRIM1` reader"]
2pub struct R(crate::R<DATTRIM1_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DATTRIM1_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DATTRIM1_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DATTRIM1_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DATTRIM1` writer"]
17pub struct W(crate::W<DATTRIM1_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DATTRIM1_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DATTRIM1_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DATTRIM1_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `ROUT` reader - Trim for DP and DM Output Impedance for Both FS and LS"]
38pub type ROUT_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `ROUT` writer - Trim for DP and DM Output Impedance for Both FS and LS"]
40pub type ROUT_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 6, 0>;
41#[doc = "Field `ENDLYPULLUP` reader - Enables Delay of Pull in TX Mode for Both FS and LS"]
42pub type ENDLYPULLUP_R = crate::BitReader<bool>;
43#[doc = "Field `ENDLYPULLUP` writer - Enables Delay of Pull in TX Mode for Both FS and LS"]
44pub type ENDLYPULLUP_W<'a> = crate::BitWriter<'a, u32, DATTRIM1_SPEC, bool, 7>;
45#[doc = "Field `DLYPULLUPFS` reader - Trim for Rising Crossover Voltage in FS"]
46pub type DLYPULLUPFS_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `DLYPULLUPFS` writer - Trim for Rising Crossover Voltage in FS"]
48pub type DLYPULLUPFS_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 2, 8>;
49#[doc = "Field `VCRSFS` reader - Trim for Falling Crossover Voltage in FS"]
50pub type VCRSFS_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `VCRSFS` writer - Trim for Falling Crossover Voltage in FS"]
52pub type VCRSFS_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 2, 10>;
53#[doc = "Field `TFDMFS` reader - Trim for DM Fall Time in FS"]
54pub type TFDMFS_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `TFDMFS` writer - Trim for DM Fall Time in FS"]
56pub type TFDMFS_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 2, 12>;
57#[doc = "Field `TRDMFS` reader - Trim for DM Rise Time in FS"]
58pub type TRDMFS_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `TRDMFS` writer - Trim for DM Rise Time in FS"]
60pub type TRDMFS_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 2, 14>;
61#[doc = "Field `TFDPFS` reader - Trim for DP Fall Time in FS"]
62pub type TFDPFS_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `TFDPFS` writer - Trim for DP Fall Time in FS"]
64pub type TFDPFS_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 2, 16>;
65#[doc = "Field `TRDPFS` reader - Trim for DP Rise Time in FS"]
66pub type TRDPFS_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `TRDPFS` writer - Trim for DP Rise Time in FS"]
68pub type TRDPFS_W<'a> = crate::FieldWriter<'a, u32, DATTRIM1_SPEC, u8, u8, 2, 18>;
69impl R {
70 #[doc = "Bits 0:5 - Trim for DP and DM Output Impedance for Both FS and LS"]
71 #[inline(always)]
72 pub fn rout(&self) -> ROUT_R {
73 ROUT_R::new((self.bits & 0x3f) as u8)
74 }
75 #[doc = "Bit 7 - Enables Delay of Pull in TX Mode for Both FS and LS"]
76 #[inline(always)]
77 pub fn endlypullup(&self) -> ENDLYPULLUP_R {
78 ENDLYPULLUP_R::new(((self.bits >> 7) & 1) != 0)
79 }
80 #[doc = "Bits 8:9 - Trim for Rising Crossover Voltage in FS"]
81 #[inline(always)]
82 pub fn dlypullupfs(&self) -> DLYPULLUPFS_R {
83 DLYPULLUPFS_R::new(((self.bits >> 8) & 3) as u8)
84 }
85 #[doc = "Bits 10:11 - Trim for Falling Crossover Voltage in FS"]
86 #[inline(always)]
87 pub fn vcrsfs(&self) -> VCRSFS_R {
88 VCRSFS_R::new(((self.bits >> 10) & 3) as u8)
89 }
90 #[doc = "Bits 12:13 - Trim for DM Fall Time in FS"]
91 #[inline(always)]
92 pub fn tfdmfs(&self) -> TFDMFS_R {
93 TFDMFS_R::new(((self.bits >> 12) & 3) as u8)
94 }
95 #[doc = "Bits 14:15 - Trim for DM Rise Time in FS"]
96 #[inline(always)]
97 pub fn trdmfs(&self) -> TRDMFS_R {
98 TRDMFS_R::new(((self.bits >> 14) & 3) as u8)
99 }
100 #[doc = "Bits 16:17 - Trim for DP Fall Time in FS"]
101 #[inline(always)]
102 pub fn tfdpfs(&self) -> TFDPFS_R {
103 TFDPFS_R::new(((self.bits >> 16) & 3) as u8)
104 }
105 #[doc = "Bits 18:19 - Trim for DP Rise Time in FS"]
106 #[inline(always)]
107 pub fn trdpfs(&self) -> TRDPFS_R {
108 TRDPFS_R::new(((self.bits >> 18) & 3) as u8)
109 }
110}
111impl W {
112 #[doc = "Bits 0:5 - Trim for DP and DM Output Impedance for Both FS and LS"]
113 #[inline(always)]
114 pub fn rout(&mut self) -> ROUT_W {
115 ROUT_W::new(self)
116 }
117 #[doc = "Bit 7 - Enables Delay of Pull in TX Mode for Both FS and LS"]
118 #[inline(always)]
119 pub fn endlypullup(&mut self) -> ENDLYPULLUP_W {
120 ENDLYPULLUP_W::new(self)
121 }
122 #[doc = "Bits 8:9 - Trim for Rising Crossover Voltage in FS"]
123 #[inline(always)]
124 pub fn dlypullupfs(&mut self) -> DLYPULLUPFS_W {
125 DLYPULLUPFS_W::new(self)
126 }
127 #[doc = "Bits 10:11 - Trim for Falling Crossover Voltage in FS"]
128 #[inline(always)]
129 pub fn vcrsfs(&mut self) -> VCRSFS_W {
130 VCRSFS_W::new(self)
131 }
132 #[doc = "Bits 12:13 - Trim for DM Fall Time in FS"]
133 #[inline(always)]
134 pub fn tfdmfs(&mut self) -> TFDMFS_W {
135 TFDMFS_W::new(self)
136 }
137 #[doc = "Bits 14:15 - Trim for DM Rise Time in FS"]
138 #[inline(always)]
139 pub fn trdmfs(&mut self) -> TRDMFS_W {
140 TRDMFS_W::new(self)
141 }
142 #[doc = "Bits 16:17 - Trim for DP Fall Time in FS"]
143 #[inline(always)]
144 pub fn tfdpfs(&mut self) -> TFDPFS_W {
145 TFDPFS_W::new(self)
146 }
147 #[doc = "Bits 18:19 - Trim for DP Rise Time in FS"]
148 #[inline(always)]
149 pub fn trdpfs(&mut self) -> TRDPFS_W {
150 TRDPFS_W::new(self)
151 }
152 #[doc = "Writes raw bits to the register."]
153 #[inline(always)]
154 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
155 self.0.bits(bits);
156 self
157 }
158}
159#[doc = "Data TRIM 1 Values for USB DP and DM\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dattrim1](index.html) module"]
160pub struct DATTRIM1_SPEC;
161impl crate::RegisterSpec for DATTRIM1_SPEC {
162 type Ux = u32;
163}
164#[doc = "`read()` method returns [dattrim1::R](R) reader structure"]
165impl crate::Readable for DATTRIM1_SPEC {
166 type Reader = R;
167}
168#[doc = "`write(|w| ..)` method takes [dattrim1::W](W) writer structure"]
169impl crate::Writable for DATTRIM1_SPEC {
170 type Writer = W;
171}
172#[doc = "`reset()` method sets DATTRIM1 to value 0x24"]
173impl crate::Resettable for DATTRIM1_SPEC {
174 #[inline(always)]
175 fn reset_value() -> Self::Ux {
176 0x24
177 }
178}