efm32gg12b830_pac/sdio/
cfg1.rs

1#[doc = "Register `CFG1` reader"]
2pub struct R(crate::R<CFG1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG1` writer"]
17pub struct W(crate::W<CFG1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ASYNCINTRSUP` reader - Asynchronous Interrupt Support"]
38pub type ASYNCINTRSUP_R = crate::BitReader<bool>;
39#[doc = "Field `ASYNCINTRSUP` writer - Asynchronous Interrupt Support"]
40pub type ASYNCINTRSUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 0>;
41#[doc = "Slot Type\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum SLOTTYPE_A {
45    #[doc = "0: Removable SD Card Slot"]
46    RMSDSLOT = 0,
47    #[doc = "1: Embedded SD Card Slot"]
48    EMSDSLOT = 1,
49    #[doc = "2: Shared SD Card Slot"]
50    SHBUSSLOT = 2,
51}
52impl From<SLOTTYPE_A> for u8 {
53    #[inline(always)]
54    fn from(variant: SLOTTYPE_A) -> Self {
55        variant as _
56    }
57}
58#[doc = "Field `SLOTTYPE` reader - Slot Type"]
59pub type SLOTTYPE_R = crate::FieldReader<u8, SLOTTYPE_A>;
60impl SLOTTYPE_R {
61    #[doc = "Get enumerated values variant"]
62    #[inline(always)]
63    pub fn variant(&self) -> Option<SLOTTYPE_A> {
64        match self.bits {
65            0 => Some(SLOTTYPE_A::RMSDSLOT),
66            1 => Some(SLOTTYPE_A::EMSDSLOT),
67            2 => Some(SLOTTYPE_A::SHBUSSLOT),
68            _ => None,
69        }
70    }
71    #[doc = "Checks if the value of the field is `RMSDSLOT`"]
72    #[inline(always)]
73    pub fn is_rmsdslot(&self) -> bool {
74        *self == SLOTTYPE_A::RMSDSLOT
75    }
76    #[doc = "Checks if the value of the field is `EMSDSLOT`"]
77    #[inline(always)]
78    pub fn is_emsdslot(&self) -> bool {
79        *self == SLOTTYPE_A::EMSDSLOT
80    }
81    #[doc = "Checks if the value of the field is `SHBUSSLOT`"]
82    #[inline(always)]
83    pub fn is_shbusslot(&self) -> bool {
84        *self == SLOTTYPE_A::SHBUSSLOT
85    }
86}
87#[doc = "Field `SLOTTYPE` writer - Slot Type"]
88pub type SLOTTYPE_W<'a> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, SLOTTYPE_A, 2, 1>;
89impl<'a> SLOTTYPE_W<'a> {
90    #[doc = "Removable SD Card Slot"]
91    #[inline(always)]
92    pub fn rmsdslot(self) -> &'a mut W {
93        self.variant(SLOTTYPE_A::RMSDSLOT)
94    }
95    #[doc = "Embedded SD Card Slot"]
96    #[inline(always)]
97    pub fn emsdslot(self) -> &'a mut W {
98        self.variant(SLOTTYPE_A::EMSDSLOT)
99    }
100    #[doc = "Shared SD Card Slot"]
101    #[inline(always)]
102    pub fn shbusslot(self) -> &'a mut W {
103        self.variant(SLOTTYPE_A::SHBUSSLOT)
104    }
105}
106#[doc = "Field `CSDR50SUP` reader - Core Support SDR50"]
107pub type CSDR50SUP_R = crate::BitReader<bool>;
108#[doc = "Field `CSDR50SUP` writer - Core Support SDR50"]
109pub type CSDR50SUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 3>;
110#[doc = "Field `CSDR104SUP` reader - Support SDR104"]
111pub type CSDR104SUP_R = crate::BitReader<bool>;
112#[doc = "Field `CSDR104SUP` writer - Support SDR104"]
113pub type CSDR104SUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 4>;
114#[doc = "Field `CDDR50SUP` reader - Support DDR50"]
115pub type CDDR50SUP_R = crate::BitReader<bool>;
116#[doc = "Field `CDDR50SUP` writer - Support DDR50"]
117pub type CDDR50SUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 5>;
118#[doc = "Field `CDRVASUP` reader - Support Type a Driver"]
119pub type CDRVASUP_R = crate::BitReader<bool>;
120#[doc = "Field `CDRVASUP` writer - Support Type a Driver"]
121pub type CDRVASUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 6>;
122#[doc = "Field `CDRVCSUP` reader - Support Type C Driver"]
123pub type CDRVCSUP_R = crate::BitReader<bool>;
124#[doc = "Field `CDRVCSUP` writer - Support Type C Driver"]
125pub type CDRVCSUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 7>;
126#[doc = "Field `CDRVDSUP` reader - Support Type D Driver"]
127pub type CDRVDSUP_R = crate::BitReader<bool>;
128#[doc = "Field `CDRVDSUP` writer - Support Type D Driver"]
129pub type CDRVDSUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 8>;
130#[doc = "Field `RETUNTMRCTL` reader - Retuning Timer Control"]
131pub type RETUNTMRCTL_R = crate::FieldReader<u8, u8>;
132#[doc = "Field `RETUNTMRCTL` writer - Retuning Timer Control"]
133pub type RETUNTMRCTL_W<'a> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, u8, 4, 9>;
134#[doc = "Field `TUNSDR50` reader - Tuning for SDR50"]
135pub type TUNSDR50_R = crate::BitReader<bool>;
136#[doc = "Field `TUNSDR50` writer - Tuning for SDR50"]
137pub type TUNSDR50_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 13>;
138#[doc = "Field `RETUNMODES` reader - Retuning Modes"]
139pub type RETUNMODES_R = crate::FieldReader<u8, u8>;
140#[doc = "Field `RETUNMODES` writer - Retuning Modes"]
141pub type RETUNMODES_W<'a> = crate::FieldWriter<'a, u32, CFG1_SPEC, u8, u8, 2, 14>;
142#[doc = "Field `SPISUP` reader - SPI Support"]
143pub type SPISUP_R = crate::BitReader<bool>;
144#[doc = "Field `SPISUP` writer - SPI Support"]
145pub type SPISUP_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 16>;
146#[doc = "Field `ASYNCWKUPEN` reader - Asynchronous Wakeup Enable"]
147pub type ASYNCWKUPEN_R = crate::BitReader<bool>;
148#[doc = "Field `ASYNCWKUPEN` writer - Asynchronous Wakeup Enable"]
149pub type ASYNCWKUPEN_W<'a> = crate::BitWriter<'a, u32, CFG1_SPEC, bool, 18>;
150impl R {
151    #[doc = "Bit 0 - Asynchronous Interrupt Support"]
152    #[inline(always)]
153    pub fn asyncintrsup(&self) -> ASYNCINTRSUP_R {
154        ASYNCINTRSUP_R::new((self.bits & 1) != 0)
155    }
156    #[doc = "Bits 1:2 - Slot Type"]
157    #[inline(always)]
158    pub fn slottype(&self) -> SLOTTYPE_R {
159        SLOTTYPE_R::new(((self.bits >> 1) & 3) as u8)
160    }
161    #[doc = "Bit 3 - Core Support SDR50"]
162    #[inline(always)]
163    pub fn csdr50sup(&self) -> CSDR50SUP_R {
164        CSDR50SUP_R::new(((self.bits >> 3) & 1) != 0)
165    }
166    #[doc = "Bit 4 - Support SDR104"]
167    #[inline(always)]
168    pub fn csdr104sup(&self) -> CSDR104SUP_R {
169        CSDR104SUP_R::new(((self.bits >> 4) & 1) != 0)
170    }
171    #[doc = "Bit 5 - Support DDR50"]
172    #[inline(always)]
173    pub fn cddr50sup(&self) -> CDDR50SUP_R {
174        CDDR50SUP_R::new(((self.bits >> 5) & 1) != 0)
175    }
176    #[doc = "Bit 6 - Support Type a Driver"]
177    #[inline(always)]
178    pub fn cdrvasup(&self) -> CDRVASUP_R {
179        CDRVASUP_R::new(((self.bits >> 6) & 1) != 0)
180    }
181    #[doc = "Bit 7 - Support Type C Driver"]
182    #[inline(always)]
183    pub fn cdrvcsup(&self) -> CDRVCSUP_R {
184        CDRVCSUP_R::new(((self.bits >> 7) & 1) != 0)
185    }
186    #[doc = "Bit 8 - Support Type D Driver"]
187    #[inline(always)]
188    pub fn cdrvdsup(&self) -> CDRVDSUP_R {
189        CDRVDSUP_R::new(((self.bits >> 8) & 1) != 0)
190    }
191    #[doc = "Bits 9:12 - Retuning Timer Control"]
192    #[inline(always)]
193    pub fn retuntmrctl(&self) -> RETUNTMRCTL_R {
194        RETUNTMRCTL_R::new(((self.bits >> 9) & 0x0f) as u8)
195    }
196    #[doc = "Bit 13 - Tuning for SDR50"]
197    #[inline(always)]
198    pub fn tunsdr50(&self) -> TUNSDR50_R {
199        TUNSDR50_R::new(((self.bits >> 13) & 1) != 0)
200    }
201    #[doc = "Bits 14:15 - Retuning Modes"]
202    #[inline(always)]
203    pub fn retunmodes(&self) -> RETUNMODES_R {
204        RETUNMODES_R::new(((self.bits >> 14) & 3) as u8)
205    }
206    #[doc = "Bit 16 - SPI Support"]
207    #[inline(always)]
208    pub fn spisup(&self) -> SPISUP_R {
209        SPISUP_R::new(((self.bits >> 16) & 1) != 0)
210    }
211    #[doc = "Bit 18 - Asynchronous Wakeup Enable"]
212    #[inline(always)]
213    pub fn asyncwkupen(&self) -> ASYNCWKUPEN_R {
214        ASYNCWKUPEN_R::new(((self.bits >> 18) & 1) != 0)
215    }
216}
217impl W {
218    #[doc = "Bit 0 - Asynchronous Interrupt Support"]
219    #[inline(always)]
220    pub fn asyncintrsup(&mut self) -> ASYNCINTRSUP_W {
221        ASYNCINTRSUP_W::new(self)
222    }
223    #[doc = "Bits 1:2 - Slot Type"]
224    #[inline(always)]
225    pub fn slottype(&mut self) -> SLOTTYPE_W {
226        SLOTTYPE_W::new(self)
227    }
228    #[doc = "Bit 3 - Core Support SDR50"]
229    #[inline(always)]
230    pub fn csdr50sup(&mut self) -> CSDR50SUP_W {
231        CSDR50SUP_W::new(self)
232    }
233    #[doc = "Bit 4 - Support SDR104"]
234    #[inline(always)]
235    pub fn csdr104sup(&mut self) -> CSDR104SUP_W {
236        CSDR104SUP_W::new(self)
237    }
238    #[doc = "Bit 5 - Support DDR50"]
239    #[inline(always)]
240    pub fn cddr50sup(&mut self) -> CDDR50SUP_W {
241        CDDR50SUP_W::new(self)
242    }
243    #[doc = "Bit 6 - Support Type a Driver"]
244    #[inline(always)]
245    pub fn cdrvasup(&mut self) -> CDRVASUP_W {
246        CDRVASUP_W::new(self)
247    }
248    #[doc = "Bit 7 - Support Type C Driver"]
249    #[inline(always)]
250    pub fn cdrvcsup(&mut self) -> CDRVCSUP_W {
251        CDRVCSUP_W::new(self)
252    }
253    #[doc = "Bit 8 - Support Type D Driver"]
254    #[inline(always)]
255    pub fn cdrvdsup(&mut self) -> CDRVDSUP_W {
256        CDRVDSUP_W::new(self)
257    }
258    #[doc = "Bits 9:12 - Retuning Timer Control"]
259    #[inline(always)]
260    pub fn retuntmrctl(&mut self) -> RETUNTMRCTL_W {
261        RETUNTMRCTL_W::new(self)
262    }
263    #[doc = "Bit 13 - Tuning for SDR50"]
264    #[inline(always)]
265    pub fn tunsdr50(&mut self) -> TUNSDR50_W {
266        TUNSDR50_W::new(self)
267    }
268    #[doc = "Bits 14:15 - Retuning Modes"]
269    #[inline(always)]
270    pub fn retunmodes(&mut self) -> RETUNMODES_W {
271        RETUNMODES_W::new(self)
272    }
273    #[doc = "Bit 16 - SPI Support"]
274    #[inline(always)]
275    pub fn spisup(&mut self) -> SPISUP_W {
276        SPISUP_W::new(self)
277    }
278    #[doc = "Bit 18 - Asynchronous Wakeup Enable"]
279    #[inline(always)]
280    pub fn asyncwkupen(&mut self) -> ASYNCWKUPEN_W {
281        ASYNCWKUPEN_W::new(self)
282    }
283    #[doc = "Writes raw bits to the register."]
284    #[inline(always)]
285    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
286        self.0.bits(bits);
287        self
288    }
289}
290#[doc = "Core Configuration 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"]
291pub struct CFG1_SPEC;
292impl crate::RegisterSpec for CFG1_SPEC {
293    type Ux = u32;
294}
295#[doc = "`read()` method returns [cfg1::R](R) reader structure"]
296impl crate::Readable for CFG1_SPEC {
297    type Reader = R;
298}
299#[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"]
300impl crate::Writable for CFG1_SPEC {
301    type Writer = W;
302}
303#[doc = "`reset()` method sets CFG1 to value 0"]
304impl crate::Resettable for CFG1_SPEC {
305    #[inline(always)]
306    fn reset_value() -> Self::Ux {
307        0
308    }
309}
efm32gg12b830_pac/sdio/cfg1.rs

efm32gg12b830_pac/sdio/
cfg1.rs
