efm32gg12b830_pac/emu/
r5vctrl.rs

1#[doc = "Register `R5VCTRL` reader"]
2pub struct R(crate::R<R5VCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<R5VCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<R5VCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<R5VCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `R5VCTRL` writer"]
17pub struct W(crate::W<R5VCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<R5VCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<R5VCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<R5VCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `BYPASS` reader - 5V Regulator Bypass"]
38pub type BYPASS_R = crate::BitReader<bool>;
39#[doc = "Field `BYPASS` writer - 5V Regulator Bypass"]
40pub type BYPASS_W<'a> = crate::BitWriter<'a, u32, R5VCTRL_SPEC, bool, 0>;
41#[doc = "Field `EM4WUEN` reader - Enable EM4 Wakeup Due to VBUS Detection"]
42pub type EM4WUEN_R = crate::BitReader<bool>;
43#[doc = "Field `EM4WUEN` writer - Enable EM4 Wakeup Due to VBUS Detection"]
44pub type EM4WUEN_W<'a> = crate::BitWriter<'a, u32, R5VCTRL_SPEC, bool, 1>;
45#[doc = "Field `IMONEN` reader - Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or VBUS"]
46pub type IMONEN_R = crate::BitReader<bool>;
47#[doc = "Field `IMONEN` writer - Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or VBUS"]
48pub type IMONEN_W<'a> = crate::BitWriter<'a, u32, R5VCTRL_SPEC, bool, 2>;
49#[doc = "5V Input Mode\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum INPUTMODE_A {
53    #[doc = "0: Regulator input supply switched automatically to the highest voltage of either VBUS or VREGI"]
54    AUTO = 0,
55    #[doc = "1: Force VBUS pin as the regulator input"]
56    VBUS = 1,
57    #[doc = "2: Force VREGI pin as the regulator input"]
58    VREGI = 2,
59}
60impl From<INPUTMODE_A> for u8 {
61    #[inline(always)]
62    fn from(variant: INPUTMODE_A) -> Self {
63        variant as _
64    }
65}
66#[doc = "Field `INPUTMODE` reader - 5V Input Mode"]
67pub type INPUTMODE_R = crate::FieldReader<u8, INPUTMODE_A>;
68impl INPUTMODE_R {
69    #[doc = "Get enumerated values variant"]
70    #[inline(always)]
71    pub fn variant(&self) -> Option<INPUTMODE_A> {
72        match self.bits {
73            0 => Some(INPUTMODE_A::AUTO),
74            1 => Some(INPUTMODE_A::VBUS),
75            2 => Some(INPUTMODE_A::VREGI),
76            _ => None,
77        }
78    }
79    #[doc = "Checks if the value of the field is `AUTO`"]
80    #[inline(always)]
81    pub fn is_auto(&self) -> bool {
82        *self == INPUTMODE_A::AUTO
83    }
84    #[doc = "Checks if the value of the field is `VBUS`"]
85    #[inline(always)]
86    pub fn is_vbus(&self) -> bool {
87        *self == INPUTMODE_A::VBUS
88    }
89    #[doc = "Checks if the value of the field is `VREGI`"]
90    #[inline(always)]
91    pub fn is_vregi(&self) -> bool {
92        *self == INPUTMODE_A::VREGI
93    }
94}
95#[doc = "Field `INPUTMODE` writer - 5V Input Mode"]
96pub type INPUTMODE_W<'a> = crate::FieldWriter<'a, u32, R5VCTRL_SPEC, u8, INPUTMODE_A, 2, 8>;
97impl<'a> INPUTMODE_W<'a> {
98    #[doc = "Regulator input supply switched automatically to the highest voltage of either VBUS or VREGI"]
99    #[inline(always)]
100    pub fn auto(self) -> &'a mut W {
101        self.variant(INPUTMODE_A::AUTO)
102    }
103    #[doc = "Force VBUS pin as the regulator input"]
104    #[inline(always)]
105    pub fn vbus(self) -> &'a mut W {
106        self.variant(INPUTMODE_A::VBUS)
107    }
108    #[doc = "Force VREGI pin as the regulator input"]
109    #[inline(always)]
110    pub fn vregi(self) -> &'a mut W {
111        self.variant(INPUTMODE_A::VREGI)
112    }
113}
114impl R {
115    #[doc = "Bit 0 - 5V Regulator Bypass"]
116    #[inline(always)]
117    pub fn bypass(&self) -> BYPASS_R {
118        BYPASS_R::new((self.bits & 1) != 0)
119    }
120    #[doc = "Bit 1 - Enable EM4 Wakeup Due to VBUS Detection"]
121    #[inline(always)]
122    pub fn em4wuen(&self) -> EM4WUEN_R {
123        EM4WUEN_R::new(((self.bits >> 1) & 1) != 0)
124    }
125    #[doc = "Bit 2 - Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or VBUS"]
126    #[inline(always)]
127    pub fn imonen(&self) -> IMONEN_R {
128        IMONEN_R::new(((self.bits >> 2) & 1) != 0)
129    }
130    #[doc = "Bits 8:9 - 5V Input Mode"]
131    #[inline(always)]
132    pub fn inputmode(&self) -> INPUTMODE_R {
133        INPUTMODE_R::new(((self.bits >> 8) & 3) as u8)
134    }
135}
136impl W {
137    #[doc = "Bit 0 - 5V Regulator Bypass"]
138    #[inline(always)]
139    pub fn bypass(&mut self) -> BYPASS_W {
140        BYPASS_W::new(self)
141    }
142    #[doc = "Bit 1 - Enable EM4 Wakeup Due to VBUS Detection"]
143    #[inline(always)]
144    pub fn em4wuen(&mut self) -> EM4WUEN_W {
145        EM4WUEN_W::new(self)
146    }
147    #[doc = "Bit 2 - Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or VBUS"]
148    #[inline(always)]
149    pub fn imonen(&mut self) -> IMONEN_W {
150        IMONEN_W::new(self)
151    }
152    #[doc = "Bits 8:9 - 5V Input Mode"]
153    #[inline(always)]
154    pub fn inputmode(&mut self) -> INPUTMODE_W {
155        INPUTMODE_W::new(self)
156    }
157    #[doc = "Writes raw bits to the register."]
158    #[inline(always)]
159    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
160        self.0.bits(bits);
161        self
162    }
163}
164#[doc = "5V Regulator Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r5vctrl](index.html) module"]
165pub struct R5VCTRL_SPEC;
166impl crate::RegisterSpec for R5VCTRL_SPEC {
167    type Ux = u32;
168}
169#[doc = "`read()` method returns [r5vctrl::R](R) reader structure"]
170impl crate::Readable for R5VCTRL_SPEC {
171    type Reader = R;
172}
173#[doc = "`write(|w| ..)` method takes [r5vctrl::W](W) writer structure"]
174impl crate::Writable for R5VCTRL_SPEC {
175    type Writer = W;
176}
177#[doc = "`reset()` method sets R5VCTRL to value 0"]
178impl crate::Resettable for R5VCTRL_SPEC {
179    #[inline(always)]
180    fn reset_value() -> Self::Ux {
181        0
182    }
183}
efm32gg12b830_pac/emu/r5vctrl.rs

efm32gg12b830_pac/emu/
r5vctrl.rs
