[−][src]Module efm32gg11b820::sdio
SDIO
Modules
| ac12errstat | AUTO CMD12 Error Status and Host Control2 Register |
| admaes | ADMA Error Status Register |
| adsaddr | ADMA System Address Register |
| blksize | Block Size and Block Count Register |
| boottoctrl | Boot Timeout Control Register |
| bufdatport | Buffer Data Register |
| capab0 | Capabilities Register to Hold Bits 31~0 |
| capab2 | Capabilities Register to Hold Bits 63~32 |
| cfg0 | Core Configuration 0 |
| cfg1 | Core Configuration 1 |
| cfgpresetval0 | Core Configuration Preset Value 0 |
| cfgpresetval1 | Core Configuration Preset Value 1 |
| cfgpresetval2 | Core Configuration Preset Value 2 |
| cfgpresetval3 | Core Configuration Preset Value 3 |
| clockctrl | Clock Control, Timeout Control and Software Register |
| cmdarg1 | SD Command Argument Register |
| ctrl | Core Control Signals |
| fevterrstat | Force Event Register for Auto CMD Error Status |
| hostctrl1 | Host Control1, Power, Block Gap and Wakeup-up Control Register |
| ien | Normal and Error Interrupt Signal Enable Register |
| ifcr | Normal and Error Interrupt Status Register |
| ifenc | Normal and Error Interrupt Status Enable Register |
| maxcurcapab | Maximum Current Capabilities Register |
| prsstat | Present State Register |
| prstval0 | Preset Value for Initialization and Default Speed Mode |
| prstval2 | Preset Value for High Speed and SDR12 Modes |
| prstval4 | Preset Value for SDR25 and SDR50 Modes |
| prstval6 | Preset Value for SDR104 and DDR50 Modes |
| resp0 | Response0 and Response1 Register |
| resp2 | Response2 and Response3 Register |
| resp4 | Response4 and Response5 Register |
| resp6 | Response6 and Response7 Register |
| routeloc0 | I/O LOCATION Register |
| routeloc1 | I/O LOCATION Register |
| routepen | I/O LOCATION Enable Register |
| sdmasysaddr | SDMA System Address Register |
| slotintstat | Slot Interrupt Status Register |
| tfrmode | Transfer Mode and Command Register |
Structs
| AC12ERRSTAT | AUTO CMD12 Error Status and Host Control2 Register |
| ADMAES | ADMA Error Status Register |
| ADSADDR | ADMA System Address Register |
| BLKSIZE | Block Size and Block Count Register |
| BOOTTOCTRL | Boot Timeout Control Register |
| BUFDATPORT | Buffer Data Register |
| CAPAB0 | Capabilities Register to Hold Bits 31~0 |
| CAPAB2 | Capabilities Register to Hold Bits 63~32 |
| CFG0 | Core Configuration 0 |
| CFG1 | Core Configuration 1 |
| CFGPRESETVAL0 | Core Configuration Preset Value 0 |
| CFGPRESETVAL1 | Core Configuration Preset Value 1 |
| CFGPRESETVAL2 | Core Configuration Preset Value 2 |
| CFGPRESETVAL3 | Core Configuration Preset Value 3 |
| CLOCKCTRL | Clock Control, Timeout Control and Software Register |
| CMDARG1 | SD Command Argument Register |
| CTRL | Core Control Signals |
| FEVTERRSTAT | Force Event Register for Auto CMD Error Status |
| HOSTCTRL1 | Host Control1, Power, Block Gap and Wakeup-up Control Register |
| IEN | Normal and Error Interrupt Signal Enable Register |
| IFCR | Normal and Error Interrupt Status Register |
| IFENC | Normal and Error Interrupt Status Enable Register |
| MAXCURCAPAB | Maximum Current Capabilities Register |
| PRSSTAT | Present State Register |
| PRSTVAL0 | Preset Value for Initialization and Default Speed Mode |
| PRSTVAL2 | Preset Value for High Speed and SDR12 Modes |
| PRSTVAL4 | Preset Value for SDR25 and SDR50 Modes |
| PRSTVAL6 | Preset Value for SDR104 and DDR50 Modes |
| RESP0 | Response0 and Response1 Register |
| RESP2 | Response2 and Response3 Register |
| RESP4 | Response4 and Response5 Register |
| RESP6 | Response6 and Response7 Register |
| ROUTELOC0 | I/O LOCATION Register |
| ROUTELOC1 | I/O LOCATION Register |
| ROUTEPEN | I/O LOCATION Enable Register |
| RegisterBlock | Register block |
| SDMASYSADDR | SDMA System Address Register |
| SLOTINTSTAT | Slot Interrupt Status Register |
| TFRMODE | Transfer Mode and Command Register |