Module efm32gg11b820::adc0

source ·
Expand description

ADC0

Modules

APORT Conflict Status Register
APORT Bus Master Disable Register
APORT Request Status Register
Bias Programming Register for Various Analog Blocks Used in ADC Operation
Calibration Register
Command Register
Compare Threshold Register
Control Register
Interrupt Enable Register
Interrupt Flag Register
Interrupt Flag Clear Register
Interrupt Flag Set Register
Scan Control Register
Scan Control Register Continued
Scan Conversion Result Data
Scan Sequence Result Data Peek Register
Scan Sequence Result Data + Data Source Register
Scan Sequence Result Data + Data Source Peek Register
Scan FIFO Clear Register
Scan FIFO Count Register
Input Selection Register for Scan Mode
Scan Sequence Input Mask Register
Negative Input Select Register for Scan
Single Channel Control Register
Single Channel Control Register Continued
Single Conversion Result Data
Single Conversion Result Data Peek Register
Single FIFO Clear Register
Single FIFO Count Register
Status Register

Structs

APORT Conflict Status Register
APORT Bus Master Disable Register
APORT Request Status Register
Bias Programming Register for Various Analog Blocks Used in ADC Operation
Calibration Register
Command Register
Compare Threshold Register
Control Register
Interrupt Enable Register
Interrupt Flag Register
Interrupt Flag Clear Register
Interrupt Flag Set Register
Register block
Scan Control Register
Scan Control Register Continued
Scan Conversion Result Data
Scan Sequence Result Data Peek Register
Scan Sequence Result Data + Data Source Register
Scan Sequence Result Data + Data Source Peek Register
Scan FIFO Clear Register
Scan FIFO Count Register
Input Selection Register for Scan Mode
Scan Sequence Input Mask Register
Negative Input Select Register for Scan
Single Channel Control Register
Single Channel Control Register Continued
Single Conversion Result Data
Single Conversion Result Data Peek Register
Single FIFO Clear Register
Single FIFO Count Register
Status Register