Module efm32gg11b820::leuart0 [] [src]

LEUART0

Modules

clkdiv

Clock Control Register

cmd

Command Register

ctrl

Control Register

freeze

Freeze Register

ien

Interrupt Enable Register

if_

Interrupt Flag Register

ifc

Interrupt Flag Clear Register

ifs

Interrupt Flag Set Register

input

LEUART Input Register

pulsectrl

Pulse Control Register

routeloc0

I/O Routing Location Register

routepen

I/O Routing Pin Enable Register

rxdata

Receive Buffer Data Register

rxdatax

Receive Buffer Data Extended Register

rxdataxp

Receive Buffer Data Extended Peek Register

sigframe

Signal Frame Register

startframe

Start Frame Register

status

Status Register

syncbusy

Synchronization Busy Register

txdata

Transmit Buffer Data Register

txdatax

Transmit Buffer Data Extended Register

Structs

CLKDIV

Clock Control Register

CMD

Command Register

CTRL

Control Register

FREEZE

Freeze Register

IEN

Interrupt Enable Register

IF

Interrupt Flag Register

IFC

Interrupt Flag Clear Register

IFS

Interrupt Flag Set Register

INPUT

LEUART Input Register

PULSECTRL

Pulse Control Register

ROUTELOC0

I/O Routing Location Register

ROUTEPEN

I/O Routing Pin Enable Register

RXDATA

Receive Buffer Data Register

RXDATAX

Receive Buffer Data Extended Register

RXDATAXP

Receive Buffer Data Extended Peek Register

RegisterBlock

Register block

SIGFRAME

Signal Frame Register

STARTFRAME

Start Frame Register

STATUS

Status Register

SYNCBUSY

Synchronization Busy Register

TXDATA

Transmit Buffer Data Register

TXDATAX

Transmit Buffer Data Extended Register