efm32gg11b420_pac/i2c1/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - I2C Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - I2C Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `SLAVE` reader - Addressable as Slave"]
42pub type SLAVE_R = crate::BitReader<bool>;
43#[doc = "Field `SLAVE` writer - Addressable as Slave"]
44pub type SLAVE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
45#[doc = "Field `AUTOACK` reader - Automatic Acknowledge"]
46pub type AUTOACK_R = crate::BitReader<bool>;
47#[doc = "Field `AUTOACK` writer - Automatic Acknowledge"]
48pub type AUTOACK_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
49#[doc = "Field `AUTOSE` reader - Automatic STOP When Empty"]
50pub type AUTOSE_R = crate::BitReader<bool>;
51#[doc = "Field `AUTOSE` writer - Automatic STOP When Empty"]
52pub type AUTOSE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
53#[doc = "Field `AUTOSN` reader - Automatic STOP on NACK"]
54pub type AUTOSN_R = crate::BitReader<bool>;
55#[doc = "Field `AUTOSN` writer - Automatic STOP on NACK"]
56pub type AUTOSN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
57#[doc = "Field `ARBDIS` reader - Arbitration Disable"]
58pub type ARBDIS_R = crate::BitReader<bool>;
59#[doc = "Field `ARBDIS` writer - Arbitration Disable"]
60pub type ARBDIS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
61#[doc = "Field `GCAMEN` reader - General Call Address Match Enable"]
62pub type GCAMEN_R = crate::BitReader<bool>;
63#[doc = "Field `GCAMEN` writer - General Call Address Match Enable"]
64pub type GCAMEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
65#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"]
66pub type TXBIL_R = crate::BitReader<bool>;
67#[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"]
68pub type TXBIL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 7>;
69#[doc = "Clock Low High Ratio\n\nValue on reset: 0"]
70#[derive(Clone, Copy, Debug, PartialEq)]
71#[repr(u8)]
72pub enum CLHR_A {
73    #[doc = "0: The ratio between low period and high period counters (Nlow:Nhigh) is 4:4"]
74    STANDARD = 0,
75    #[doc = "1: The ratio between low period and high period counters (Nlow:Nhigh) is 6:3"]
76    ASYMMETRIC = 1,
77    #[doc = "2: The ratio between low period and high period counters (Nlow:Nhigh) is 11:6"]
78    FAST = 2,
79}
80impl From<CLHR_A> for u8 {
81    #[inline(always)]
82    fn from(variant: CLHR_A) -> Self {
83        variant as _
84    }
85}
86#[doc = "Field `CLHR` reader - Clock Low High Ratio"]
87pub type CLHR_R = crate::FieldReader<u8, CLHR_A>;
88impl CLHR_R {
89    #[doc = "Get enumerated values variant"]
90    #[inline(always)]
91    pub fn variant(&self) -> Option<CLHR_A> {
92        match self.bits {
93            0 => Some(CLHR_A::STANDARD),
94            1 => Some(CLHR_A::ASYMMETRIC),
95            2 => Some(CLHR_A::FAST),
96            _ => None,
97        }
98    }
99    #[doc = "Checks if the value of the field is `STANDARD`"]
100    #[inline(always)]
101    pub fn is_standard(&self) -> bool {
102        *self == CLHR_A::STANDARD
103    }
104    #[doc = "Checks if the value of the field is `ASYMMETRIC`"]
105    #[inline(always)]
106    pub fn is_asymmetric(&self) -> bool {
107        *self == CLHR_A::ASYMMETRIC
108    }
109    #[doc = "Checks if the value of the field is `FAST`"]
110    #[inline(always)]
111    pub fn is_fast(&self) -> bool {
112        *self == CLHR_A::FAST
113    }
114}
115#[doc = "Field `CLHR` writer - Clock Low High Ratio"]
116pub type CLHR_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLHR_A, 2, 8>;
117impl<'a> CLHR_W<'a> {
118    #[doc = "The ratio between low period and high period counters (Nlow:Nhigh) is 4:4"]
119    #[inline(always)]
120    pub fn standard(self) -> &'a mut W {
121        self.variant(CLHR_A::STANDARD)
122    }
123    #[doc = "The ratio between low period and high period counters (Nlow:Nhigh) is 6:3"]
124    #[inline(always)]
125    pub fn asymmetric(self) -> &'a mut W {
126        self.variant(CLHR_A::ASYMMETRIC)
127    }
128    #[doc = "The ratio between low period and high period counters (Nlow:Nhigh) is 11:6"]
129    #[inline(always)]
130    pub fn fast(self) -> &'a mut W {
131        self.variant(CLHR_A::FAST)
132    }
133}
134#[doc = "Bus Idle Timeout\n\nValue on reset: 0"]
135#[derive(Clone, Copy, Debug, PartialEq)]
136#[repr(u8)]
137pub enum BITO_A {
138    #[doc = "0: Timeout disabled"]
139    OFF = 0,
140    #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."]
141    _40PCC = 1,
142    #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."]
143    _80PCC = 2,
144    #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."]
145    _160PCC = 3,
146}
147impl From<BITO_A> for u8 {
148    #[inline(always)]
149    fn from(variant: BITO_A) -> Self {
150        variant as _
151    }
152}
153#[doc = "Field `BITO` reader - Bus Idle Timeout"]
154pub type BITO_R = crate::FieldReader<u8, BITO_A>;
155impl BITO_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> BITO_A {
159        match self.bits {
160            0 => BITO_A::OFF,
161            1 => BITO_A::_40PCC,
162            2 => BITO_A::_80PCC,
163            3 => BITO_A::_160PCC,
164            _ => unreachable!(),
165        }
166    }
167    #[doc = "Checks if the value of the field is `OFF`"]
168    #[inline(always)]
169    pub fn is_off(&self) -> bool {
170        *self == BITO_A::OFF
171    }
172    #[doc = "Checks if the value of the field is `_40PCC`"]
173    #[inline(always)]
174    pub fn is_40pcc(&self) -> bool {
175        *self == BITO_A::_40PCC
176    }
177    #[doc = "Checks if the value of the field is `_80PCC`"]
178    #[inline(always)]
179    pub fn is_80pcc(&self) -> bool {
180        *self == BITO_A::_80PCC
181    }
182    #[doc = "Checks if the value of the field is `_160PCC`"]
183    #[inline(always)]
184    pub fn is_160pcc(&self) -> bool {
185        *self == BITO_A::_160PCC
186    }
187}
188#[doc = "Field `BITO` writer - Bus Idle Timeout"]
189pub type BITO_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, BITO_A, 2, 12>;
190impl<'a> BITO_W<'a> {
191    #[doc = "Timeout disabled"]
192    #[inline(always)]
193    pub fn off(self) -> &'a mut W {
194        self.variant(BITO_A::OFF)
195    }
196    #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."]
197    #[inline(always)]
198    pub fn _40pcc(self) -> &'a mut W {
199        self.variant(BITO_A::_40PCC)
200    }
201    #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."]
202    #[inline(always)]
203    pub fn _80pcc(self) -> &'a mut W {
204        self.variant(BITO_A::_80PCC)
205    }
206    #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."]
207    #[inline(always)]
208    pub fn _160pcc(self) -> &'a mut W {
209        self.variant(BITO_A::_160PCC)
210    }
211}
212#[doc = "Field `GIBITO` reader - Go Idle on Bus Idle Timeout"]
213pub type GIBITO_R = crate::BitReader<bool>;
214#[doc = "Field `GIBITO` writer - Go Idle on Bus Idle Timeout"]
215pub type GIBITO_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 15>;
216#[doc = "Clock Low Timeout\n\nValue on reset: 0"]
217#[derive(Clone, Copy, Debug, PartialEq)]
218#[repr(u8)]
219pub enum CLTO_A {
220    #[doc = "0: Timeout disabled"]
221    OFF = 0,
222    #[doc = "1: Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."]
223    _40PCC = 1,
224    #[doc = "2: Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."]
225    _80PCC = 2,
226    #[doc = "3: Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."]
227    _160PCC = 3,
228    #[doc = "4: Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."]
229    _320PCC = 4,
230    #[doc = "5: Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."]
231    _1024PCC = 5,
232}
233impl From<CLTO_A> for u8 {
234    #[inline(always)]
235    fn from(variant: CLTO_A) -> Self {
236        variant as _
237    }
238}
239#[doc = "Field `CLTO` reader - Clock Low Timeout"]
240pub type CLTO_R = crate::FieldReader<u8, CLTO_A>;
241impl CLTO_R {
242    #[doc = "Get enumerated values variant"]
243    #[inline(always)]
244    pub fn variant(&self) -> Option<CLTO_A> {
245        match self.bits {
246            0 => Some(CLTO_A::OFF),
247            1 => Some(CLTO_A::_40PCC),
248            2 => Some(CLTO_A::_80PCC),
249            3 => Some(CLTO_A::_160PCC),
250            4 => Some(CLTO_A::_320PCC),
251            5 => Some(CLTO_A::_1024PCC),
252            _ => None,
253        }
254    }
255    #[doc = "Checks if the value of the field is `OFF`"]
256    #[inline(always)]
257    pub fn is_off(&self) -> bool {
258        *self == CLTO_A::OFF
259    }
260    #[doc = "Checks if the value of the field is `_40PCC`"]
261    #[inline(always)]
262    pub fn is_40pcc(&self) -> bool {
263        *self == CLTO_A::_40PCC
264    }
265    #[doc = "Checks if the value of the field is `_80PCC`"]
266    #[inline(always)]
267    pub fn is_80pcc(&self) -> bool {
268        *self == CLTO_A::_80PCC
269    }
270    #[doc = "Checks if the value of the field is `_160PCC`"]
271    #[inline(always)]
272    pub fn is_160pcc(&self) -> bool {
273        *self == CLTO_A::_160PCC
274    }
275    #[doc = "Checks if the value of the field is `_320PCC`"]
276    #[inline(always)]
277    pub fn is_320pcc(&self) -> bool {
278        *self == CLTO_A::_320PCC
279    }
280    #[doc = "Checks if the value of the field is `_1024PCC`"]
281    #[inline(always)]
282    pub fn is_1024pcc(&self) -> bool {
283        *self == CLTO_A::_1024PCC
284    }
285}
286#[doc = "Field `CLTO` writer - Clock Low Timeout"]
287pub type CLTO_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLTO_A, 3, 16>;
288impl<'a> CLTO_W<'a> {
289    #[doc = "Timeout disabled"]
290    #[inline(always)]
291    pub fn off(self) -> &'a mut W {
292        self.variant(CLTO_A::OFF)
293    }
294    #[doc = "Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout."]
295    #[inline(always)]
296    pub fn _40pcc(self) -> &'a mut W {
297        self.variant(CLTO_A::_40PCC)
298    }
299    #[doc = "Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout."]
300    #[inline(always)]
301    pub fn _80pcc(self) -> &'a mut W {
302        self.variant(CLTO_A::_80PCC)
303    }
304    #[doc = "Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout."]
305    #[inline(always)]
306    pub fn _160pcc(self) -> &'a mut W {
307        self.variant(CLTO_A::_160PCC)
308    }
309    #[doc = "Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout."]
310    #[inline(always)]
311    pub fn _320pcc(self) -> &'a mut W {
312        self.variant(CLTO_A::_320PCC)
313    }
314    #[doc = "Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout."]
315    #[inline(always)]
316    pub fn _1024pcc(self) -> &'a mut W {
317        self.variant(CLTO_A::_1024PCC)
318    }
319}
320impl R {
321    #[doc = "Bit 0 - I2C Enable"]
322    #[inline(always)]
323    pub fn en(&self) -> EN_R {
324        EN_R::new((self.bits & 1) != 0)
325    }
326    #[doc = "Bit 1 - Addressable as Slave"]
327    #[inline(always)]
328    pub fn slave(&self) -> SLAVE_R {
329        SLAVE_R::new(((self.bits >> 1) & 1) != 0)
330    }
331    #[doc = "Bit 2 - Automatic Acknowledge"]
332    #[inline(always)]
333    pub fn autoack(&self) -> AUTOACK_R {
334        AUTOACK_R::new(((self.bits >> 2) & 1) != 0)
335    }
336    #[doc = "Bit 3 - Automatic STOP When Empty"]
337    #[inline(always)]
338    pub fn autose(&self) -> AUTOSE_R {
339        AUTOSE_R::new(((self.bits >> 3) & 1) != 0)
340    }
341    #[doc = "Bit 4 - Automatic STOP on NACK"]
342    #[inline(always)]
343    pub fn autosn(&self) -> AUTOSN_R {
344        AUTOSN_R::new(((self.bits >> 4) & 1) != 0)
345    }
346    #[doc = "Bit 5 - Arbitration Disable"]
347    #[inline(always)]
348    pub fn arbdis(&self) -> ARBDIS_R {
349        ARBDIS_R::new(((self.bits >> 5) & 1) != 0)
350    }
351    #[doc = "Bit 6 - General Call Address Match Enable"]
352    #[inline(always)]
353    pub fn gcamen(&self) -> GCAMEN_R {
354        GCAMEN_R::new(((self.bits >> 6) & 1) != 0)
355    }
356    #[doc = "Bit 7 - TX Buffer Interrupt Level"]
357    #[inline(always)]
358    pub fn txbil(&self) -> TXBIL_R {
359        TXBIL_R::new(((self.bits >> 7) & 1) != 0)
360    }
361    #[doc = "Bits 8:9 - Clock Low High Ratio"]
362    #[inline(always)]
363    pub fn clhr(&self) -> CLHR_R {
364        CLHR_R::new(((self.bits >> 8) & 3) as u8)
365    }
366    #[doc = "Bits 12:13 - Bus Idle Timeout"]
367    #[inline(always)]
368    pub fn bito(&self) -> BITO_R {
369        BITO_R::new(((self.bits >> 12) & 3) as u8)
370    }
371    #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"]
372    #[inline(always)]
373    pub fn gibito(&self) -> GIBITO_R {
374        GIBITO_R::new(((self.bits >> 15) & 1) != 0)
375    }
376    #[doc = "Bits 16:18 - Clock Low Timeout"]
377    #[inline(always)]
378    pub fn clto(&self) -> CLTO_R {
379        CLTO_R::new(((self.bits >> 16) & 7) as u8)
380    }
381}
382impl W {
383    #[doc = "Bit 0 - I2C Enable"]
384    #[inline(always)]
385    pub fn en(&mut self) -> EN_W {
386        EN_W::new(self)
387    }
388    #[doc = "Bit 1 - Addressable as Slave"]
389    #[inline(always)]
390    pub fn slave(&mut self) -> SLAVE_W {
391        SLAVE_W::new(self)
392    }
393    #[doc = "Bit 2 - Automatic Acknowledge"]
394    #[inline(always)]
395    pub fn autoack(&mut self) -> AUTOACK_W {
396        AUTOACK_W::new(self)
397    }
398    #[doc = "Bit 3 - Automatic STOP When Empty"]
399    #[inline(always)]
400    pub fn autose(&mut self) -> AUTOSE_W {
401        AUTOSE_W::new(self)
402    }
403    #[doc = "Bit 4 - Automatic STOP on NACK"]
404    #[inline(always)]
405    pub fn autosn(&mut self) -> AUTOSN_W {
406        AUTOSN_W::new(self)
407    }
408    #[doc = "Bit 5 - Arbitration Disable"]
409    #[inline(always)]
410    pub fn arbdis(&mut self) -> ARBDIS_W {
411        ARBDIS_W::new(self)
412    }
413    #[doc = "Bit 6 - General Call Address Match Enable"]
414    #[inline(always)]
415    pub fn gcamen(&mut self) -> GCAMEN_W {
416        GCAMEN_W::new(self)
417    }
418    #[doc = "Bit 7 - TX Buffer Interrupt Level"]
419    #[inline(always)]
420    pub fn txbil(&mut self) -> TXBIL_W {
421        TXBIL_W::new(self)
422    }
423    #[doc = "Bits 8:9 - Clock Low High Ratio"]
424    #[inline(always)]
425    pub fn clhr(&mut self) -> CLHR_W {
426        CLHR_W::new(self)
427    }
428    #[doc = "Bits 12:13 - Bus Idle Timeout"]
429    #[inline(always)]
430    pub fn bito(&mut self) -> BITO_W {
431        BITO_W::new(self)
432    }
433    #[doc = "Bit 15 - Go Idle on Bus Idle Timeout"]
434    #[inline(always)]
435    pub fn gibito(&mut self) -> GIBITO_W {
436        GIBITO_W::new(self)
437    }
438    #[doc = "Bits 16:18 - Clock Low Timeout"]
439    #[inline(always)]
440    pub fn clto(&mut self) -> CLTO_W {
441        CLTO_W::new(self)
442    }
443    #[doc = "Writes raw bits to the register."]
444    #[inline(always)]
445    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
446        self.0.bits(bits);
447        self
448    }
449}
450#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
451pub struct CTRL_SPEC;
452impl crate::RegisterSpec for CTRL_SPEC {
453    type Ux = u32;
454}
455#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
456impl crate::Readable for CTRL_SPEC {
457    type Reader = R;
458}
459#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
460impl crate::Writable for CTRL_SPEC {
461    type Writer = W;
462}
463#[doc = "`reset()` method sets CTRL to value 0"]
464impl crate::Resettable for CTRL_SPEC {
465    #[inline(always)]
466    fn reset_value() -> Self::Ux {
467        0
468    }
469}
efm32gg11b420_pac/i2c1/ctrl.rs

efm32gg11b420_pac/i2c1/
ctrl.rs
