Module efm32gg11b::usart5[][src]

Expand description

USART5

Modules

Clock Control Register

Command Register

Control Register

Control Register Extended

USART Frame Format Register

I2S Control Register

Interrupt Enable Register

Interrupt Flag Register

Interrupt Flag Clear Register

Interrupt Flag Set Register

USART Input Register

IrDA Control Register

I/O Routing Location Register

I/O Routing Location Register

I/O Routing Pin Enable Register

RX Buffer Data Register

RX Buffer Data Extended Register

RX Buffer Data Extended Peek Register

RX FIFO Double Data Register

RX Buffer Double Data Extended Register

RX Buffer Double Data Extended Peek Register

USART Status Register

Used to Generate Interrupts and Various Delays

Used to Generate Interrupts and Various Delays

Used to Generate Interrupts and Various Delays

Timing Register

USART Trigger Control Register

TX Buffer Data Register

TX Buffer Data Extended Register

TX Buffer Double Data Register

TX Buffer Double Data Extended Register

Structs

Register block

Type Definitions

Clock Control Register

Command Register

Control Register

Control Register Extended

USART Frame Format Register

I2S Control Register

Interrupt Enable Register

Interrupt Flag Register

Interrupt Flag Clear Register

Interrupt Flag Set Register

USART Input Register

IrDA Control Register

I/O Routing Location Register

I/O Routing Location Register

I/O Routing Pin Enable Register

RX Buffer Data Register

RX Buffer Data Extended Register

RX Buffer Data Extended Peek Register

RX FIFO Double Data Register

RX Buffer Double Data Extended Register

RX Buffer Double Data Extended Peek Register

USART Status Register

Used to Generate Interrupts and Various Delays

Used to Generate Interrupts and Various Delays

Used to Generate Interrupts and Various Delays

Timing Register

USART Trigger Control Register

TX Buffer Data Register

TX Buffer Data Extended Register

TX Buffer Double Data Register

TX Buffer Double Data Extended Register