Module efm32gg11b::leuart0[−][src]

Expand description

LEUART0

Modules

Clock Control Register

Command Register

Control Register

Freeze Register

Interrupt Enable Register

Interrupt Flag Register

Interrupt Flag Clear Register

Interrupt Flag Set Register

LEUART Input Register

Pulse Control Register

I/O Routing Location Register

I/O Routing Pin Enable Register

Receive Buffer Data Register

Receive Buffer Data Extended Register

Receive Buffer Data Extended Peek Register

Signal Frame Register

Start Frame Register

Status Register

Synchronization Busy Register

Transmit Buffer Data Register

Transmit Buffer Data Extended Register

Structs

Register block

Type Definitions

Clock Control Register

Command Register

Control Register

Freeze Register

Interrupt Enable Register

Interrupt Flag Register

Interrupt Flag Clear Register

Interrupt Flag Set Register

LEUART Input Register

Pulse Control Register

I/O Routing Location Register

I/O Routing Pin Enable Register

Receive Buffer Data Register

Receive Buffer Data Extended Register

Receive Buffer Data Extended Peek Register

Signal Frame Register

Start Frame Register

Status Register

Synchronization Busy Register

Transmit Buffer Data Register

Transmit Buffer Data Extended Register