Module efm32gg11b::eth[][src]

Expand description

ETH

Modules

Alignment Errors

Receive DMA Flushed Packets

Broadcast Frames Received

Broadcast Frames Transmitted

Carrier Sense Errors

Ethernet control register

Deferred Transmission Frames

DMA Configuration Register

Excessive Collisions

Oversize Frames Received

Frame Check Sequence Errors

64 Byte Frames Received

65 to 127 Byte Frames Received

128 to 255 Byte Frames Received

256 to 511 Byte Frames Received

512 to 1023 Byte Frames Received

1024 to 1518 Byte Frames Received

1519 to maximum Byte Frames Received

Frames Received

64 Byte Frames Transmitted

65 to 127 Byte Frames Transmitted

128 to 255 Byte Frames Transmitted

256 to 511 Byte Frames Transmitted

512 to 1023 Byte Frames Transmitted

1024 to 1518 Byte Frames Transmitted

Greater Than 1518 Byte Frames Transmitted

Frames Transmitted

Hash Register Bottom [31:0]

Hash Register Top [63:32]

Interrupt Disable Register

Interrupt mask register

Interrupt Enable Register

Interrupt status register

Interrupt moderation register

Maximum Jumbo Frame Size.

Late Collisions

Specific Address Mask 1 Bottom 31:0

Specific Address Mask 1 Top 47:32

Multicast Frames Received

Multicast Frames Transmitted

Multiple Collision Frames

Network configuration register

Network control register

Network status register

Octets Received 31:0

Octets Received 47:32

Octets transmitted 31:0

Octets Transmitted 47:32

RX Partial Store and Forward

TX Partial Store and Forward

Pause Frames Received

Pause Frames Transmitted

PHY management register

I/O Route Location Register 0

I/O Route Location Register 1

I/O Route Enable Register

RX BD control register

IP Header Checksum Errors

Jabbers Received

Length Field Frame Errors

Received LPI transitions

Received LPI time

Receive Overruns

Received Pause Quantum Register

PTP RX unicast IP destination address

Start address of the receive buffer queue

Receive Resource Errors

Receive status register

Receive Symbol Errors

TCP Checksum Errors

UDP Checksum Errors

Single Collision Frames

Specific Address 1 Bottom

Specific Address 1 Top

Specific Address 2 Bottom

Specific Address 2 Top

Specific Address 3 Bottom

Specific Address 3 Top

Specific Address 4 Bottom

Specific Address 4 Top

Type ID Match 1

Type ID Match 2

Type ID Match 3

Type ID Match 4

Stacked VLAN Register

IPG stretch register

System wake time

TSU timer comparison value seconds [47:32]

TSU timer comparison value nanoseconds

PTP Peer Event Frame Received Seconds Register 47:32

PTP Peer Event Frame Received Nanoseconds Register

PTP Peer Event Frame Received Seconds Register 31:0

PTP Peer Event Frame Transmitted Seconds Register 47:32

PTP Peer Event Frame Transmitted Nanoseconds Register

PTP Peer Event Frame Transmitted Seconds Register 31:0

PTP Event Frame Received Seconds Register 47:32

PTP Event Frame Received Nanoseconds Register

PTP Event Frame Received Seconds Register 31:0

PTP Event Frame Transmitted Seconds Register 47:32

PTP Event Frame Transmitted Nanoseconds Register

PTP Event Frame Transmitted Seconds Register 31:0

TSU timer comparison value seconds [31:0]

This register returns all zeroes when read.

1588 Timer Increment Register

1588 Timer Increment Register subscript nsec

1588 Timer Seconds Register 47:32

1588 Timer Nanoseconds Register

1588 Timer Seconds Register 31:0

TX BD control register

Transmit LPI transitions

Transmit LPI time

Transmit Pause Quantum Register

Transmit Pause Quantum Register 1

Transmit Pause Quantum Register 2

Transmit Pause Quantum Register 3

Transmit PFC Pause Register

PTP TX unicast IP destination address

Start address of the transmit buffer queue

Transmit status register

Transmit Under Runs

Undersized Frames Received

Wake on LAN Register

Structs

Register block

Type Definitions

Alignment Errors

Receive DMA Flushed Packets

Broadcast Frames Received

Broadcast Frames Transmitted

Carrier Sense Errors

Ethernet control register

Deferred Transmission Frames

DMA Configuration Register

Excessive Collisions

Oversize Frames Received

Frame Check Sequence Errors

64 Byte Frames Received

65 to 127 Byte Frames Received

128 to 255 Byte Frames Received

256 to 511 Byte Frames Received

512 to 1023 Byte Frames Received

1024 to 1518 Byte Frames Received

1519 to maximum Byte Frames Received

Frames Received

64 Byte Frames Transmitted

65 to 127 Byte Frames Transmitted

128 to 255 Byte Frames Transmitted

256 to 511 Byte Frames Transmitted

512 to 1023 Byte Frames Transmitted

1024 to 1518 Byte Frames Transmitted

Greater Than 1518 Byte Frames Transmitted

Frames Transmitted

Hash Register Bottom [31:0]

Hash Register Top [63:32]

Interrupt Disable Register

Interrupt mask register

Interrupt Enable Register

Interrupt status register

Interrupt moderation register

Maximum Jumbo Frame Size.

Late Collisions

Specific Address Mask 1 Bottom 31:0

Specific Address Mask 1 Top 47:32

Multicast Frames Received

Multicast Frames Transmitted

Multiple Collision Frames

Network configuration register

Network control register

Network status register

Octets Received 31:0

Octets Received 47:32

Octets transmitted 31:0

Octets Transmitted 47:32

RX Partial Store and Forward

TX Partial Store and Forward

Pause Frames Received

Pause Frames Transmitted

PHY management register

I/O Route Location Register 0

I/O Route Location Register 1

I/O Route Enable Register

RX BD control register

IP Header Checksum Errors

Jabbers Received

Length Field Frame Errors

Received LPI transitions

Received LPI time

Receive Overruns

Received Pause Quantum Register

PTP RX unicast IP destination address

Start address of the receive buffer queue

Receive Resource Errors

Receive status register

Receive Symbol Errors

TCP Checksum Errors

UDP Checksum Errors

Single Collision Frames

Specific Address 1 Bottom

Specific Address 1 Top

Specific Address 2 Bottom

Specific Address 2 Top

Specific Address 3 Bottom

Specific Address 3 Top

Specific Address 4 Bottom

Specific Address 4 Top

Type ID Match 1

Type ID Match 2

Type ID Match 3

Type ID Match 4

Stacked VLAN Register

IPG stretch register

System wake time

TSU timer comparison value seconds [47:32]

TSU timer comparison value nanoseconds

PTP Peer Event Frame Received Seconds Register 47:32

PTP Peer Event Frame Received Nanoseconds Register

PTP Peer Event Frame Received Seconds Register 31:0

PTP Peer Event Frame Transmitted Seconds Register 47:32

PTP Peer Event Frame Transmitted Nanoseconds Register

PTP Peer Event Frame Transmitted Seconds Register 31:0

PTP Event Frame Received Seconds Register 47:32

PTP Event Frame Received Nanoseconds Register

PTP Event Frame Received Seconds Register 31:0

PTP Event Frame Transmitted Seconds Register 47:32

PTP Event Frame Transmitted Nanoseconds Register

PTP Event Frame Transmitted Seconds Register 31:0

TSU timer comparison value seconds [31:0]

This register returns all zeroes when read.

1588 Timer Increment Register

1588 Timer Increment Register subscript nsec

1588 Timer Seconds Register 47:32

1588 Timer Nanoseconds Register

1588 Timer Seconds Register 31:0

TX BD control register

Transmit LPI transitions

Transmit LPI time

Transmit Pause Quantum Register

Transmit Pause Quantum Register 1

Transmit Pause Quantum Register 2

Transmit Pause Quantum Register 3

Transmit PFC Pause Register

PTP TX unicast IP destination address

Start address of the transmit buffer queue

Transmit status register

Transmit Under Runs

Undersized Frames Received

Wake on LAN Register