Crate driver_74hc595

An embedded async driver for 74hc595 (compatible) shift registers.

For efficient data transfer, an SPI bus peripheral is used. The SPI bus should be configured in SPI Mode 0 (clock idle state low, data sampled on rising edge). Because the 74hc595 does not have a CS line, the SPI bus cannot be shared with other devices (at least not without additional circuitry).

Structs

• ShiftRegister
  A 74hc595 (compatible) shift register.