Module dbs_arch::regs

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Definitions for x86 Registers Constants and utilities for x86 CPU generic, system and model specific registers.

Enums

Errors thrown while setting up x86_64 registers.

Constants

Long-mode active bit in EFER MSR.
Long-mode enable bit in EFER MSR.
Non-Executable bit in EFER MSR.
Protection mode enable bit in CR0.
Paging enable bit in CR0.
Physical Address Extension bit in CR4.

Functions

Configure Floating-Point Unit (FPU) registers for a given CPU.
Configure Model Specific Registers (MSRs) for a given CPU.
Configure base registers for a given CPU.
Configures the segment registers for a given CPU.