Constant x86::msr::MSR_IFSB_CTL6

pub const MSR_IFSB_CTL6: u32 = 0x107d2;

IFSB Latency Event Control Register (R/W) See Section 18.17, Performance Monitoring on 64-bit Intel Xeon Processor MP with Up to 8-MByte L3 Cache for details.