Struct tm4c129x::can0::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub can_ctl: CanCtl, pub can_sts: CanSts, pub can_err: CanErr, pub can_bit: CanBit, pub can_int: CanInt, pub can_tst: CanTst, pub can_brpe: CanBrpe, pub can_if1crq: CanIf1crq, pub can_if1cmsk: CanIf1cmsk, pub can_if1msk1: CanIf1msk1, pub can_if1msk2: CanIf1msk2, pub can_if1arb1: CanIf1arb1, pub can_if1arb2: CanIf1arb2, pub can_if1mctl: CanIf1mctl, pub can_if1da1: CanIf1da1, pub can_if1da2: CanIf1da2, pub can_if1db1: CanIf1db1, pub can_if1db2: CanIf1db2, pub can_if2crq: CanIf2crq, pub can_if2cmsk: CanIf2cmsk, pub can_if2msk1: CanIf2msk1, pub can_if2msk2: CanIf2msk2, pub can_if2arb1: CanIf2arb1, pub can_if2arb2: CanIf2arb2, pub can_if2mctl: CanIf2mctl, pub can_if2da1: CanIf2da1, pub can_if2da2: CanIf2da2, pub can_if2db1: CanIf2db1, pub can_if2db2: CanIf2db2, pub can_txrq1: CanTxrq1, pub can_txrq2: CanTxrq2, pub can_nwda1: CanNwda1, pub can_nwda2: CanNwda2, pub can_msg1int: CanMsg1int, pub can_msg2int: CanMsg2int, pub can_msg1val: CanMsg1val, pub can_msg2val: CanMsg2val, // some fields omitted }
Register block
Fields
can_ctl: CanCtl
0x00 - CAN Control
can_sts: CanSts
0x04 - CAN Status
can_err: CanErr
0x08 - CAN Error Counter
can_bit: CanBit
0x0c - CAN Bit Timing
can_int: CanInt
0x10 - CAN Interrupt
can_tst: CanTst
0x14 - CAN Test
can_brpe: CanBrpe
0x18 - CAN Baud Rate Prescaler Extension
can_if1crq: CanIf1crq
0x20 - CAN IF1 Command Request
can_if1cmsk: CanIf1cmsk
0x24 - CAN IF1 Command Mask
can_if1msk1: CanIf1msk1
0x28 - CAN IF1 Mask 1
can_if1msk2: CanIf1msk2
0x2c - CAN IF1 Mask 2
can_if1arb1: CanIf1arb1
0x30 - CAN IF1 Arbitration 1
can_if1arb2: CanIf1arb2
0x34 - CAN IF1 Arbitration 2
can_if1mctl: CanIf1mctl
0x38 - CAN IF1 Message Control
can_if1da1: CanIf1da1
0x3c - CAN IF1 Data A1
can_if1da2: CanIf1da2
0x40 - CAN IF1 Data A2
can_if1db1: CanIf1db1
0x44 - CAN IF1 Data B1
can_if1db2: CanIf1db2
0x48 - CAN IF1 Data B2
can_if2crq: CanIf2crq
0x80 - CAN IF2 Command Request
can_if2cmsk: CanIf2cmsk
0x84 - CAN IF2 Command Mask
can_if2msk1: CanIf2msk1
0x88 - CAN IF2 Mask 1
can_if2msk2: CanIf2msk2
0x8c - CAN IF2 Mask 2
can_if2arb1: CanIf2arb1
0x90 - CAN IF2 Arbitration 1
can_if2arb2: CanIf2arb2
0x94 - CAN IF2 Arbitration 2
can_if2mctl: CanIf2mctl
0x98 - CAN IF2 Message Control
can_if2da1: CanIf2da1
0x9c - CAN IF2 Data A1
can_if2da2: CanIf2da2
0xa0 - CAN IF2 Data A2
can_if2db1: CanIf2db1
0xa4 - CAN IF2 Data B1
can_if2db2: CanIf2db2
0xa8 - CAN IF2 Data B2
can_txrq1: CanTxrq1
0x100 - CAN Transmission Request 1
can_txrq2: CanTxrq2
0x104 - CAN Transmission Request 2
can_nwda1: CanNwda1
0x120 - CAN New Data 1
can_nwda2: CanNwda2
0x124 - CAN New Data 2
can_msg1int: CanMsg1int
0x140 - CAN Message 1 Interrupt Pending
can_msg2int: CanMsg2int
0x144 - CAN Message 2 Interrupt Pending
can_msg1val: CanMsg1val
0x160 - CAN Message 1 Valid
can_msg2val: CanMsg2val
0x164 - CAN Message 2 Valid