[][src]Module stm32wb_pac::dma2

Direct memory access controller

Modules

ccr1

channel x configuration register

ccr2

channel x configuration register

ccr3

channel x configuration register

ccr4

channel x configuration register

ccr5

channel x configuration register

ccr6

channel x configuration register

ccr7

channel x configuration register

cmar1

channel x memory address register

cmar2

channel x memory address register

cmar3

channel x memory address register

cmar4

channel x memory address register

cmar5

channel x memory address register

cmar6

channel x memory address register

cmar7

channel x memory address register

cndtr1

channel x number of data register

cndtr2

channel x number of data register

cndtr3

channel x number of data register

cndtr4

channel x number of data register

cndtr5

channel x number of data register

cndtr6

channel x number of data register

cndtr7

channel x number of data register

cpar1

channel x peripheral address register

cpar2

channel x peripheral address register

cpar3

channel x peripheral address register

cpar4

channel x peripheral address register

cpar5

channel x peripheral address register

cpar6

channel x peripheral address register

cpar7

channel x peripheral address register

cselr

channel selection register

ifcr

interrupt flag clear register

isr

interrupt status register

Structs

RegisterBlock

Register block

Type Definitions

CCR1

channel x configuration register

CCR2

channel x configuration register

CCR3

channel x configuration register

CCR4

channel x configuration register

CCR5

channel x configuration register

CCR6

channel x configuration register

CCR7

channel x configuration register

CMAR1

channel x memory address register

CMAR2

channel x memory address register

CMAR3

channel x memory address register

CMAR4

channel x memory address register

CMAR5

channel x memory address register

CMAR6

channel x memory address register

CMAR7

channel x memory address register

CNDTR1

channel x number of data register

CNDTR2

channel x number of data register

CNDTR3

channel x number of data register

CNDTR4

channel x number of data register

CNDTR5

channel x number of data register

CNDTR6

channel x number of data register

CNDTR7

channel x number of data register

CPAR1

channel x peripheral address register

CPAR2

channel x peripheral address register

CPAR3

channel x peripheral address register

CPAR4

channel x peripheral address register

CPAR5

channel x peripheral address register

CPAR6

channel x peripheral address register

CPAR7

channel x peripheral address register

CSELR

channel selection register

IFCR

interrupt flag clear register

ISR

interrupt status register