Struct stm32l4x6::adc1::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub isr: Isr,
    pub ier: Ier,
    pub cr: Cr,
    pub cfgr: Cfgr,
    pub cfgr2: Cfgr2,
    pub smpr1: Smpr1,
    pub smpr2: Smpr2,
    pub tr1: Tr1,
    pub tr2: Tr2,
    pub tr3: Tr3,
    pub sqr1: Sqr1,
    pub sqr2: Sqr2,
    pub sqr3: Sqr3,
    pub sqr4: Sqr4,
    pub dr: Dr,
    pub jsqr: Jsqr,
    pub ofr1: Ofr1,
    pub ofr2: Ofr2,
    pub ofr3: Ofr3,
    pub ofr4: Ofr4,
    pub jdr1: Jdr1,
    pub jdr2: Jdr2,
    pub jdr3: Jdr3,
    pub jdr4: Jdr4,
    pub awd2cr: Awd2cr,
    pub awd3cr: Awd3cr,
    pub difsel: Difsel,
    pub calfact: Calfact,
    // some fields omitted
}

Register block

Fields

isr: Isr

0x00 - interrupt and status register

ier: Ier

0x04 - interrupt enable register

cr: Cr

0x08 - control register

cfgr: Cfgr

0x0c - configuration register

cfgr2: Cfgr2

0x10 - configuration register

smpr1: Smpr1

0x14 - sample time register 1

smpr2: Smpr2

0x18 - sample time register 2

tr1: Tr1

0x20 - watchdog threshold register 1

tr2: Tr2

0x24 - watchdog threshold register

tr3: Tr3

0x28 - watchdog threshold register 3

sqr1: Sqr1

0x30 - regular sequence register 1

sqr2: Sqr2

0x34 - regular sequence register 2

sqr3: Sqr3

0x38 - regular sequence register 3

sqr4: Sqr4

0x3c - regular sequence register 4

dr: Dr

0x40 - regular Data Register

jsqr: Jsqr

0x4c - injected sequence register

ofr1: Ofr1

0x60 - offset register 1

ofr2: Ofr2

0x64 - offset register 2

ofr3: Ofr3

0x68 - offset register 3

ofr4: Ofr4

0x6c - offset register 4

jdr1: Jdr1

0x80 - injected data register 1

jdr2: Jdr2

0x84 - injected data register 2

jdr3: Jdr3

0x88 - injected data register 3

jdr4: Jdr4

0x8c - injected data register 4

awd2cr: Awd2cr

0xa0 - Analog Watchdog 2 Configuration Register

awd3cr: Awd3cr

0xa4 - Analog Watchdog 3 Configuration Register

difsel: Difsel

0xb0 - Differential Mode Selection Register 2

calfact: Calfact

0xb4 - Calibration Factors