[−][src]Module stm32h7xx_hal::qspi
Quad SPI (QSPI) bus
The QSPI peripheral supports a SPI interface operating over 1, 2, or 4 IO lines.
Usage
This driver supports using the QSPI peripheral in indirect mode. This allows the peripheral to be used to read and write from an address over a quad-SPI interface.
The SPI can be configured to operate on either of the two available banks on the board. In the simplest case, this can be accomplished with just the peripheral and the GPIO pins.
use stm32h7xx_hal::qspi; // Get the device peripherals and instantiate IO pins. let dp = ...; let (sck, io0, io1, io2, io3) = ...; let mut qspi = dp.QUADSPI.bank1((sck, io0, io1, io2, io3), 3.mhz(), &ccdr.clocks, ccdr.peripheral.QSPI); // Configure QSPI to operate in 4-bit mode. qspi.configure_mode(qspi::QspiMode::FourBit).unwrap(); // Write data to address 0x00 on the QSPI interface. qspi.write(0x00, &[0xAB, 0xCD]).unwrap();
Limitations
This driver currently only supports indirect operation mode of the QSPI interface. It implements an 8-bit address followed by an arbitrary transaction length. It supports using either bank 1 or bank 2 as well as a dual flash bank (in which all 8 IOs are used for the interface).
Structs
NoIo | Used to indicate that an IO pin is not used by the QSPI interface. |
Qspi |
Enums
Bank | Indicates a specific QSPI bank to use. |
QspiError | Indicates an error with the QSPI peripheral. |
QspiMode | Represents operation modes of the QSPI interface. |
Traits
PinIo0Bank1 | |
PinIo0Bank2 | |
PinIo1Bank1 | |
PinIo1Bank2 | |
PinIo2Bank1 | |
PinIo2Bank2 | |
PinIo3Bank1 | |
PinIo3Bank2 | |
PinSck | |
PinSckBank2 | |
PinsBank1 | Indicates a set of pins can be used for the QSPI interface on bank 1. |
PinsBank2 | Indicates a set of pins can be used for the QSPI interface on bank 2. |
QspiExt |