Module stm32h7xx_hal::rcc

Reset and Clock Control

Structs

AHB1	AMBA High-performance Bus (AHB1) registers
AHB2	AMBA High-performance Bus (AHB2) registers
AHB3	AMBA High-performance Bus (AHB3) registers
AHB4	AMBA High-performance Bus (AHB4) registers
APB1L	Advanced Peripheral Bus 1L (APB1L) registers
APB1H	Advanced Peripheral Bus 1H (APB1H) registers
APB2	Advanced Peripheral Bus 2 (APB2) registers
APB3	Advanced Peripheral Bus 3 (APB3) registers
APB4	Advanced Peripheral Bus 4 (APB4) registers
Ccdr	Core Clock Distribution and Reset (CCDR)
Config	Configuration of the core clocks
CoreClocks	Frozen core clock frequencies
D3CCIPR	RCC Domain 3 Kernel Clock Configuration Register
PllConfig	Configuration of a Phase Lock Loop (PLL)
Rcc	Constrained RCC peripheral

Traits

RccExt

This module configures the RCC unit to provide set frequencies for the input to the SCGU sys_ck, the AMBA High-performace Busses and Advanced eXtensible Interface bus hclk, the AMBA Peripheral Busses pclkN and the periperal clock per_ck.