Module stm32f7xx_hal::pac::dma2::lisr[][src]

Expand description

low interrupt status register

Enums

Stream x direct mode error interrupt flag (x=3..0)

Stream x FIFO error interrupt flag (x=3..0)

Stream x half transfer interrupt flag (x=3..0)

Stream x transfer complete interrupt flag (x = 3..0)

Stream x transfer error interrupt flag (x=3..0)

Type Definitions

Stream x direct mode error interrupt flag (x=3..0)

Reader of field DMEIF0

Stream x direct mode error interrupt flag (x=3..0)

Reader of field DMEIF1

Stream x direct mode error interrupt flag (x=3..0)

Reader of field DMEIF2

Reader of field DMEIF3

Stream x FIFO error interrupt flag (x=3..0)

Reader of field FEIF0

Stream x FIFO error interrupt flag (x=3..0)

Reader of field FEIF1

Stream x FIFO error interrupt flag (x=3..0)

Reader of field FEIF2

Reader of field FEIF3

Stream x half transfer interrupt flag (x=3..0)

Reader of field HTIF0

Stream x half transfer interrupt flag (x=3..0)

Reader of field HTIF1

Stream x half transfer interrupt flag (x=3..0)

Reader of field HTIF2

Reader of field HTIF3

Reader of register LISR

Stream x transfer complete interrupt flag (x = 3..0)

Reader of field TCIF0

Stream x transfer complete interrupt flag (x = 3..0)

Reader of field TCIF1

Stream x transfer complete interrupt flag (x = 3..0)

Reader of field TCIF2

Reader of field TCIF3

Stream x transfer error interrupt flag (x=3..0)

Reader of field TEIF0

Stream x transfer error interrupt flag (x=3..0)

Reader of field TEIF1

Stream x transfer error interrupt flag (x=3..0)

Reader of field TEIF2

Reader of field TEIF3