Module stm32f7xx_hal::pac::dma2::hisr [−][src]
Expand description
high interrupt status register
Enums
Stream x direct mode error interrupt flag (x=7..4)
Stream x FIFO error interrupt flag (x=7..4)
Stream x half transfer interrupt flag (x=7..4)
Stream x transfer complete interrupt flag (x=7..4)
Stream x transfer error interrupt flag (x=7..4)
Type Definitions
Stream x direct mode error interrupt flag (x=7..4)
Reader of field DMEIF4
Stream x direct mode error interrupt flag (x=7..4)
Reader of field DMEIF5
Stream x direct mode error interrupt flag (x=7..4)
Reader of field DMEIF6
Reader of field DMEIF7
Stream x FIFO error interrupt flag (x=7..4)
Reader of field FEIF4
Stream x FIFO error interrupt flag (x=7..4)
Reader of field FEIF5
Stream x FIFO error interrupt flag (x=7..4)
Reader of field FEIF6
Reader of field FEIF7
Stream x half transfer interrupt flag (x=7..4)
Reader of field HTIF4
Stream x half transfer interrupt flag (x=7..4)
Reader of field HTIF5
Stream x half transfer interrupt flag (x=7..4)
Reader of field HTIF6
Reader of field HTIF7
Reader of register HISR
Stream x transfer complete interrupt flag (x=7..4)
Reader of field TCIF4
Stream x transfer complete interrupt flag (x=7..4)
Reader of field TCIF5
Stream x transfer complete interrupt flag (x=7..4)
Reader of field TCIF6
Reader of field TCIF7
Stream x transfer error interrupt flag (x=7..4)
Reader of field TEIF4
Stream x transfer error interrupt flag (x=7..4)
Reader of field TEIF5
Stream x transfer error interrupt flag (x=7..4)
Reader of field TEIF6
Reader of field TEIF7