Expand description

Support for the Serial Peripheral Interface (SPI) bus peripheral. Provides APIs to configure, read, and write from SPI, with blocking, nonblocking, and DMA functionality.

Structs

Represents a Serial Peripheral Interface (SPI) peripheral.

Configuration data for SPI.

SPI mode. Sets CFGR2 reigster, CPOL and CPHA fields.

Enums

Set the factor to divide the APB clock by to set baud rate. Sets SPI_CR1 register, BR field.

Number of bits in at single SPI data frame. Sets CFGR1 register, DSIZE field.

SPI error

FIFO reception threshold Sets SPI_CR2 register, FRXTH field.

Used for managing NSS / CS pin. Sets CR1 register, SSM field.

Select the communication mode between.

Possible interrupt types. Enable these in SPIx_IER. Check with SR. Clear with IFCR

Clock phase. Sets CFGR2 register, CPHA field. Stored in the config as a field of SpiMode.

Clock polarity. Sets CFGR2 register, CPOL field. Stored in the config as a field of SpiMode.