Module stm32_hal2::dma [−][src]
Expand description
Support for the Direct Memory Access (DMA) peripheral. This module handles initialization, and transfer
configuration for DMA. The Dma::cfg_channel method is called by modules that use DMA.
Structs
This struct is used to pass common (non-peripheral and non-use-specific) data when configuring a channel.
Represents a Direct Memory Access (DMA) peripheral.
Enums
Set in CCR. Can only be set when channel is disabled.
Peripheral and memory increment mode. (CCR PSIZE and MSIZE bits) Can only be set when channel is disabled.
Set in CCR. Can only be set when channel is disabled.
Represents a DMA channel to select, eg when configuring for use with a peripheral. u8 representation is used to index registers on H7 PAC (And hopefully on future PACs if they adopt H7’s approach)
A list of DMA input sources. The integer values represent their DMAMUX register value, on MCUs that use this. G4 RM, Table 91: DMAMUX: Assignment of multiplexer inputs to resources.
Interrupt type. Set in CCR using TEIE, HTIE, and TCIE bits. Can only be set when channel is disabled.
Peripheral and memory increment mode. (CCR PINC and MINC bits) Can only be set when channel is disabled.
L4 RM, 11.4.3, “DMA arbitration”: The priorities are managed in two stages: • software: priority of each channel is configured in the DMA_CCRx register, to one of the four different levels: – very high – high – medium – low • hardware: if two requests have the same software priority level, the channel with the lowest index gets priority. For example, channel 2 gets priority over channel 4. Only write to this when the channel is disabled.