[−][src]Module rsl10_pac::rf::rf_reg2f
REG2F
Structs
| CK_DIV_1_6_CK_DIV_1_6_W | Write proxy for field |
| PADS_PE_DS_GPIO_DS_W | Write proxy for field |
| PADS_PE_DS_GPIO_PE_W | Write proxy for field |
| PADS_PE_DS_NRESET_PE_W | Write proxy for field |
| PADS_PE_DS_SPI_CS_N_PE_W | Write proxy for field |
| PADS_PE_DS_SPI_MISO_PE_W | Write proxy for field |
| PADS_PE_DS_SPI_MOSI_PE_W | Write proxy for field |
| PADS_PE_DS_SPI_SCLK_PE_W | Write proxy for field |
| SUBBAND_FLL_SB_FLL_CIC_TAU_W | Write proxy for field |
| SUBBAND_FLL_SB_FLL_DITHER_W | Write proxy for field |
| SUBBAND_FLL_SB_FLL_PH_4_N8_W | Write proxy for field |
| SUBBAND_FLL_SB_FLL_WAIT_W | Write proxy for field |
| SYNC_WORD_CORR_EN_SYNC_WORD_CORR_W | Write proxy for field |
| SYNC_WORD_CORR_SYNC_WORD_BIAS_W | Write proxy for field |
Enums
| CK_DIV_1_6_CK_DIV_1_6_A | Clock division factor for ck_div_1_6 |
| PADS_PE_DS_GPIO_DS_A | If set to 1 enables the increased drive strength of the digital pads |
| PADS_PE_DS_GPIO_PE_A | If set to 1 enables the pull-up of the GPIO pads |
| PADS_PE_DS_NRESET_PE_A | If set to 1 enables the pull-up of the nreset pad |
| PADS_PE_DS_SPI_CS_N_PE_A | If set to 1 enables the pull-up of the CSN SPI pad |
| PADS_PE_DS_SPI_MISO_PE_A | If set to 1 enables the pull-up of the MISO SPI pad |
| PADS_PE_DS_SPI_MOSI_PE_A | If set to 1 enables the pull-up of the MOSI SPI pad |
| PADS_PE_DS_SPI_SCLK_PE_A | If set to 1 enables the pull-up of the SCLK SPI pad |
| SUBBAND_FLL_SB_FLL_CIC_TAU_A | Set the CIC decimator factor: 00 => 16, 01 => 32, 10 => 64, 11 => 128 |
| SUBBAND_FLL_SB_FLL_DITHER_A | Select the dithering: 00 no dithering, 01 PN9 positive, 10 PN10 negative, PN9+PN10 |
| SUBBAND_FLL_SB_FLL_PH_4_N8_A | If set to 1, it uses only 4 phases in the frequency detector. Default 8 phases |
| SUBBAND_FLL_SB_FLL_WAIT_A | Set the number of CIC samples before stopping the FLL |
| SYNC_WORD_CORR_EN_SYNC_WORD_CORR_A | If set to 1 enable the sync word bias correction with RSSI detection |
| SYNC_WORD_CORR_SYNC_WORD_BIAS_A | set the sync word bias. Without the phADC rescaler, it's 8*mod_idx. |
Type Definitions
| CK_DIV_1_6_CK_DIV_1_6_R | Reader of field |
| PADS_PE_DS_GPIO_DS_R | Reader of field |
| PADS_PE_DS_GPIO_PE_R | Reader of field |
| PADS_PE_DS_NRESET_PE_R | Reader of field |
| PADS_PE_DS_SPI_CS_N_PE_R | Reader of field |
| PADS_PE_DS_SPI_MISO_PE_R | Reader of field |
| PADS_PE_DS_SPI_MOSI_PE_R | Reader of field |
| PADS_PE_DS_SPI_SCLK_PE_R | Reader of field |
| R | Reader of register RF_REG2F |
| SUBBAND_FLL_SB_FLL_CIC_TAU_R | Reader of field |
| SUBBAND_FLL_SB_FLL_DITHER_R | Reader of field |
| SUBBAND_FLL_SB_FLL_PH_4_N8_R | Reader of field |
| SUBBAND_FLL_SB_FLL_WAIT_R | Reader of field |
| SYNC_WORD_CORR_EN_SYNC_WORD_CORR_R | Reader of field |
| SYNC_WORD_CORR_SYNC_WORD_BIAS_R | Reader of field |
| W | Writer for register RF_REG2F |