ra4e2_pac/
bus.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:48:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Control"]
28unsafe impl ::core::marker::Send for super::Bus {}
29unsafe impl ::core::marker::Sync for super::Bus {}
30impl super::Bus {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Slave Bus Control Register"]
38    #[inline(always)]
39    pub const fn busscntfhbiu(
40        &self,
41    ) -> &'static crate::common::Reg<self::Busscntfhbiu_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Busscntfhbiu_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(4352usize),
45            )
46        }
47    }
48
49    #[doc = "Slave Bus Control Register"]
50    #[inline(always)]
51    pub const fn busscntflbiu(
52        &self,
53    ) -> &'static crate::common::Reg<self::Busscntflbiu_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Busscntflbiu_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4356usize),
57            )
58        }
59    }
60
61    #[doc = "Slave Bus Control Register"]
62    #[inline(always)]
63    pub const fn busscnts0biu(
64        &self,
65    ) -> &'static crate::common::Reg<self::Busscnts0Biu_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Busscnts0Biu_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(4368usize),
69            )
70        }
71    }
72
73    #[doc = "Slave Bus Control Register"]
74    #[inline(always)]
75    pub const fn busscntpsbiu(
76        &self,
77    ) -> &'static crate::common::Reg<self::Busscntpsbiu_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Busscntpsbiu_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(4384usize),
81            )
82        }
83    }
84
85    #[doc = "Slave Bus Control Register"]
86    #[inline(always)]
87    pub const fn busscntplbiu(
88        &self,
89    ) -> &'static crate::common::Reg<self::Busscntplbiu_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Busscntplbiu_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(4400usize),
93            )
94        }
95    }
96
97    #[doc = "Slave Bus Control Register"]
98    #[inline(always)]
99    pub const fn busscntphbiu(
100        &self,
101    ) -> &'static crate::common::Reg<self::Busscntphbiu_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Busscntphbiu_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(4404usize),
105            )
106        }
107    }
108
109    #[doc = "BUS Error Address Register"]
110    #[inline(always)]
111    pub const fn buserradd(
112        &self,
113    ) -> &'static crate::common::ClusterRegisterArray<
114        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
115        3,
116        0x10,
117    > {
118        unsafe {
119            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1800usize))
120        }
121    }
122    #[inline(always)]
123    pub const fn bus1erradd(
124        &self,
125    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
126        unsafe {
127            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
128                self._svd2pac_as_ptr().add(0x1800usize),
129            )
130        }
131    }
132    #[inline(always)]
133    pub const fn bus2erradd(
134        &self,
135    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
136        unsafe {
137            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
138                self._svd2pac_as_ptr().add(0x1810usize),
139            )
140        }
141    }
142    #[inline(always)]
143    pub const fn bus3erradd(
144        &self,
145    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
146        unsafe {
147            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
148                self._svd2pac_as_ptr().add(0x1820usize),
149            )
150        }
151    }
152
153    #[doc = "BUS Error Read Write Register"]
154    #[inline(always)]
155    pub const fn buserrrw(
156        &self,
157    ) -> &'static crate::common::ClusterRegisterArray<
158        crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW>,
159        3,
160        0x10,
161    > {
162        unsafe {
163            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1804usize))
164        }
165    }
166    #[inline(always)]
167    pub const fn bus1errrw(
168        &self,
169    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(0x1804usize),
173            )
174        }
175    }
176    #[inline(always)]
177    pub const fn bus2errrw(
178        &self,
179    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(0x1814usize),
183            )
184        }
185    }
186    #[inline(always)]
187    pub const fn bus3errrw(
188        &self,
189    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(0x1824usize),
193            )
194        }
195    }
196
197    #[doc = "BUS TZF Error Address Register"]
198    #[inline(always)]
199    pub const fn btzferradd(
200        &self,
201    ) -> &'static crate::common::ClusterRegisterArray<
202        crate::common::Reg<self::Btzferradd_SPEC, crate::common::R>,
203        3,
204        0x10,
205    > {
206        unsafe {
207            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1900usize))
208        }
209    }
210    #[inline(always)]
211    pub const fn btzf1erradd(
212        &self,
213    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
214        unsafe {
215            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
216                self._svd2pac_as_ptr().add(0x1900usize),
217            )
218        }
219    }
220    #[inline(always)]
221    pub const fn btzf2erradd(
222        &self,
223    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
224        unsafe {
225            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
226                self._svd2pac_as_ptr().add(0x1910usize),
227            )
228        }
229    }
230    #[inline(always)]
231    pub const fn btzf3erradd(
232        &self,
233    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
234        unsafe {
235            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
236                self._svd2pac_as_ptr().add(0x1920usize),
237            )
238        }
239    }
240
241    #[doc = "BUS TZF Error Read Write Register"]
242    #[inline(always)]
243    pub const fn btzferrrw(
244        &self,
245    ) -> &'static crate::common::ClusterRegisterArray<
246        crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW>,
247        3,
248        0x10,
249    > {
250        unsafe {
251            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1904usize))
252        }
253    }
254    #[inline(always)]
255    pub const fn btzf1errrw(
256        &self,
257    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(0x1904usize),
261            )
262        }
263    }
264    #[inline(always)]
265    pub const fn btzf2errrw(
266        &self,
267    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(0x1914usize),
271            )
272        }
273    }
274    #[inline(always)]
275    pub const fn btzf3errrw(
276        &self,
277    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
278        unsafe {
279            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
280                self._svd2pac_as_ptr().add(0x1924usize),
281            )
282        }
283    }
284
285    #[doc = "BUS Error Status Register %s"]
286    #[inline(always)]
287    pub const fn buserrstat(
288        &self,
289    ) -> &'static crate::common::ClusterRegisterArray<
290        crate::common::Reg<self::Buserrstat_SPEC, crate::common::R>,
291        3,
292        0x10,
293    > {
294        unsafe {
295            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a00usize))
296        }
297    }
298    #[inline(always)]
299    pub const fn bus1errstat(
300        &self,
301    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
302        unsafe {
303            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
304                self._svd2pac_as_ptr().add(0x1a00usize),
305            )
306        }
307    }
308    #[inline(always)]
309    pub const fn bus2errstat(
310        &self,
311    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
312        unsafe {
313            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
314                self._svd2pac_as_ptr().add(0x1a10usize),
315            )
316        }
317    }
318    #[inline(always)]
319    pub const fn bus3errstat(
320        &self,
321    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
322        unsafe {
323            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
324                self._svd2pac_as_ptr().add(0x1a20usize),
325            )
326        }
327    }
328
329    #[doc = "BUS Error Clear Register %s"]
330    #[inline(always)]
331    pub const fn buserrclr(
332        &self,
333    ) -> &'static crate::common::ClusterRegisterArray<
334        crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW>,
335        3,
336        0x10,
337    > {
338        unsafe {
339            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a08usize))
340        }
341    }
342    #[inline(always)]
343    pub const fn bus1errclr(
344        &self,
345    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
346        unsafe {
347            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
348                self._svd2pac_as_ptr().add(0x1a08usize),
349            )
350        }
351    }
352    #[inline(always)]
353    pub const fn bus2errclr(
354        &self,
355    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
356        unsafe {
357            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
358                self._svd2pac_as_ptr().add(0x1a18usize),
359            )
360        }
361    }
362    #[inline(always)]
363    pub const fn bus3errclr(
364        &self,
365    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
366        unsafe {
367            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
368                self._svd2pac_as_ptr().add(0x1a28usize),
369            )
370        }
371    }
372
373    #[doc = "DMAC/DTC Error Status Register"]
374    #[inline(always)]
375    pub const fn dmacdtcerrstat(
376        &self,
377    ) -> &'static crate::common::Reg<self::Dmacdtcerrstat_SPEC, crate::common::R> {
378        unsafe {
379            crate::common::Reg::<self::Dmacdtcerrstat_SPEC, crate::common::R>::from_ptr(
380                self._svd2pac_as_ptr().add(6692usize),
381            )
382        }
383    }
384
385    #[doc = "DMAC/DTC Error Clear Register"]
386    #[inline(always)]
387    pub const fn dmacdtcerrclr(
388        &self,
389    ) -> &'static crate::common::Reg<self::Dmacdtcerrclr_SPEC, crate::common::RW> {
390        unsafe {
391            crate::common::Reg::<self::Dmacdtcerrclr_SPEC, crate::common::RW>::from_ptr(
392                self._svd2pac_as_ptr().add(6700usize),
393            )
394        }
395    }
396}
397#[doc(hidden)]
398#[derive(Copy, Clone, Eq, PartialEq)]
399pub struct Busscntfhbiu_SPEC;
400impl crate::sealed::RegSpec for Busscntfhbiu_SPEC {
401    type DataType = u16;
402}
403
404#[doc = "Slave Bus Control Register"]
405pub type Busscntfhbiu = crate::RegValueT<Busscntfhbiu_SPEC>;
406
407impl Busscntfhbiu {
408    #[doc = "Arbitration Select for two masters"]
409    #[inline(always)]
410    pub fn arbs(
411        self,
412    ) -> crate::common::RegisterField<
413        0,
414        0x3,
415        1,
416        0,
417        busscntfhbiu::Arbs,
418        busscntfhbiu::Arbs,
419        Busscntfhbiu_SPEC,
420        crate::common::RW,
421    > {
422        crate::common::RegisterField::<
423            0,
424            0x3,
425            1,
426            0,
427            busscntfhbiu::Arbs,
428            busscntfhbiu::Arbs,
429            Busscntfhbiu_SPEC,
430            crate::common::RW,
431        >::from_register(self, 0)
432    }
433}
434impl ::core::default::Default for Busscntfhbiu {
435    #[inline(always)]
436    fn default() -> Busscntfhbiu {
437        <crate::RegValueT<Busscntfhbiu_SPEC> as RegisterValue<_>>::new(0)
438    }
439}
440pub mod busscntfhbiu {
441
442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
443    pub struct Arbs_SPEC;
444    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
445    impl Arbs {
446        #[doc = "DMAC/DTC > CPU"]
447        pub const _00: Self = Self::new(0);
448
449        #[doc = "DMAC/DTC ↔ CPU"]
450        pub const _01: Self = Self::new(1);
451
452        #[doc = "Setting prohibited"]
453        pub const OTHERS: Self = Self::new(0);
454    }
455}
456#[doc(hidden)]
457#[derive(Copy, Clone, Eq, PartialEq)]
458pub struct Busscntflbiu_SPEC;
459impl crate::sealed::RegSpec for Busscntflbiu_SPEC {
460    type DataType = u16;
461}
462
463#[doc = "Slave Bus Control Register"]
464pub type Busscntflbiu = crate::RegValueT<Busscntflbiu_SPEC>;
465
466impl Busscntflbiu {
467    #[doc = "Arbitration Select for two masters"]
468    #[inline(always)]
469    pub fn arbs(
470        self,
471    ) -> crate::common::RegisterField<
472        0,
473        0x3,
474        1,
475        0,
476        busscntflbiu::Arbs,
477        busscntflbiu::Arbs,
478        Busscntflbiu_SPEC,
479        crate::common::RW,
480    > {
481        crate::common::RegisterField::<
482            0,
483            0x3,
484            1,
485            0,
486            busscntflbiu::Arbs,
487            busscntflbiu::Arbs,
488            Busscntflbiu_SPEC,
489            crate::common::RW,
490        >::from_register(self, 0)
491    }
492}
493impl ::core::default::Default for Busscntflbiu {
494    #[inline(always)]
495    fn default() -> Busscntflbiu {
496        <crate::RegValueT<Busscntflbiu_SPEC> as RegisterValue<_>>::new(0)
497    }
498}
499pub mod busscntflbiu {
500
501    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
502    pub struct Arbs_SPEC;
503    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
504    impl Arbs {
505        #[doc = "DMAC/DTC > CPU"]
506        pub const _00: Self = Self::new(0);
507
508        #[doc = "DMAC/DTC ↔ CPU"]
509        pub const _01: Self = Self::new(1);
510
511        #[doc = "Setting prohibited"]
512        pub const OTHERS: Self = Self::new(0);
513    }
514}
515#[doc(hidden)]
516#[derive(Copy, Clone, Eq, PartialEq)]
517pub struct Busscnts0Biu_SPEC;
518impl crate::sealed::RegSpec for Busscnts0Biu_SPEC {
519    type DataType = u16;
520}
521
522#[doc = "Slave Bus Control Register"]
523pub type Busscnts0Biu = crate::RegValueT<Busscnts0Biu_SPEC>;
524
525impl Busscnts0Biu {
526    #[doc = "Arbitration Select for two masters"]
527    #[inline(always)]
528    pub fn arbs(
529        self,
530    ) -> crate::common::RegisterField<
531        0,
532        0x3,
533        1,
534        0,
535        busscnts0biu::Arbs,
536        busscnts0biu::Arbs,
537        Busscnts0Biu_SPEC,
538        crate::common::RW,
539    > {
540        crate::common::RegisterField::<
541            0,
542            0x3,
543            1,
544            0,
545            busscnts0biu::Arbs,
546            busscnts0biu::Arbs,
547            Busscnts0Biu_SPEC,
548            crate::common::RW,
549        >::from_register(self, 0)
550    }
551}
552impl ::core::default::Default for Busscnts0Biu {
553    #[inline(always)]
554    fn default() -> Busscnts0Biu {
555        <crate::RegValueT<Busscnts0Biu_SPEC> as RegisterValue<_>>::new(0)
556    }
557}
558pub mod busscnts0biu {
559
560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
561    pub struct Arbs_SPEC;
562    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
563    impl Arbs {
564        #[doc = "DMAC/DTC > CPU"]
565        pub const _00: Self = Self::new(0);
566
567        #[doc = "DMAC/DTC ↔ CPU"]
568        pub const _01: Self = Self::new(1);
569
570        #[doc = "Setting prohibited"]
571        pub const OTHERS: Self = Self::new(0);
572    }
573}
574#[doc(hidden)]
575#[derive(Copy, Clone, Eq, PartialEq)]
576pub struct Busscntpsbiu_SPEC;
577impl crate::sealed::RegSpec for Busscntpsbiu_SPEC {
578    type DataType = u16;
579}
580
581#[doc = "Slave Bus Control Register"]
582pub type Busscntpsbiu = crate::RegValueT<Busscntpsbiu_SPEC>;
583
584impl Busscntpsbiu {
585    #[doc = "Arbitration Select for two masters"]
586    #[inline(always)]
587    pub fn arbs(
588        self,
589    ) -> crate::common::RegisterField<
590        0,
591        0x1,
592        1,
593        0,
594        busscntpsbiu::Arbs,
595        busscntpsbiu::Arbs,
596        Busscntpsbiu_SPEC,
597        crate::common::RW,
598    > {
599        crate::common::RegisterField::<
600            0,
601            0x1,
602            1,
603            0,
604            busscntpsbiu::Arbs,
605            busscntpsbiu::Arbs,
606            Busscntpsbiu_SPEC,
607            crate::common::RW,
608        >::from_register(self, 0)
609    }
610}
611impl ::core::default::Default for Busscntpsbiu {
612    #[inline(always)]
613    fn default() -> Busscntpsbiu {
614        <crate::RegValueT<Busscntpsbiu_SPEC> as RegisterValue<_>>::new(0)
615    }
616}
617pub mod busscntpsbiu {
618
619    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
620    pub struct Arbs_SPEC;
621    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
622    impl Arbs {
623        #[doc = "DMAC/DTC > CPU"]
624        pub const _0: Self = Self::new(0);
625
626        #[doc = "DMAC/DTC ↔ CPU"]
627        pub const _1: Self = Self::new(1);
628    }
629}
630#[doc(hidden)]
631#[derive(Copy, Clone, Eq, PartialEq)]
632pub struct Busscntplbiu_SPEC;
633impl crate::sealed::RegSpec for Busscntplbiu_SPEC {
634    type DataType = u16;
635}
636
637#[doc = "Slave Bus Control Register"]
638pub type Busscntplbiu = crate::RegValueT<Busscntplbiu_SPEC>;
639
640impl Busscntplbiu {
641    #[doc = "Arbitration Select for two masters"]
642    #[inline(always)]
643    pub fn arbs(
644        self,
645    ) -> crate::common::RegisterField<
646        0,
647        0x1,
648        1,
649        0,
650        busscntplbiu::Arbs,
651        busscntplbiu::Arbs,
652        Busscntplbiu_SPEC,
653        crate::common::RW,
654    > {
655        crate::common::RegisterField::<
656            0,
657            0x1,
658            1,
659            0,
660            busscntplbiu::Arbs,
661            busscntplbiu::Arbs,
662            Busscntplbiu_SPEC,
663            crate::common::RW,
664        >::from_register(self, 0)
665    }
666}
667impl ::core::default::Default for Busscntplbiu {
668    #[inline(always)]
669    fn default() -> Busscntplbiu {
670        <crate::RegValueT<Busscntplbiu_SPEC> as RegisterValue<_>>::new(0)
671    }
672}
673pub mod busscntplbiu {
674
675    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
676    pub struct Arbs_SPEC;
677    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
678    impl Arbs {
679        #[doc = "DMAC/DTC > CPU"]
680        pub const _0: Self = Self::new(0);
681
682        #[doc = "DMAC/DTC ↔ CPU"]
683        pub const _1: Self = Self::new(1);
684    }
685}
686#[doc(hidden)]
687#[derive(Copy, Clone, Eq, PartialEq)]
688pub struct Busscntphbiu_SPEC;
689impl crate::sealed::RegSpec for Busscntphbiu_SPEC {
690    type DataType = u16;
691}
692
693#[doc = "Slave Bus Control Register"]
694pub type Busscntphbiu = crate::RegValueT<Busscntphbiu_SPEC>;
695
696impl Busscntphbiu {
697    #[doc = "Arbitration Select for two masters"]
698    #[inline(always)]
699    pub fn arbs(
700        self,
701    ) -> crate::common::RegisterField<
702        0,
703        0x1,
704        1,
705        0,
706        busscntphbiu::Arbs,
707        busscntphbiu::Arbs,
708        Busscntphbiu_SPEC,
709        crate::common::RW,
710    > {
711        crate::common::RegisterField::<
712            0,
713            0x1,
714            1,
715            0,
716            busscntphbiu::Arbs,
717            busscntphbiu::Arbs,
718            Busscntphbiu_SPEC,
719            crate::common::RW,
720        >::from_register(self, 0)
721    }
722}
723impl ::core::default::Default for Busscntphbiu {
724    #[inline(always)]
725    fn default() -> Busscntphbiu {
726        <crate::RegValueT<Busscntphbiu_SPEC> as RegisterValue<_>>::new(0)
727    }
728}
729pub mod busscntphbiu {
730
731    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
732    pub struct Arbs_SPEC;
733    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
734    impl Arbs {
735        #[doc = "DMAC/DTC > CPU"]
736        pub const _0: Self = Self::new(0);
737
738        #[doc = "DMAC/DTC ↔ CPU"]
739        pub const _1: Self = Self::new(1);
740    }
741}
742#[doc(hidden)]
743#[derive(Copy, Clone, Eq, PartialEq)]
744pub struct Buserradd_SPEC;
745impl crate::sealed::RegSpec for Buserradd_SPEC {
746    type DataType = u32;
747}
748
749#[doc = "BUS Error Address Register"]
750pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
751
752impl Buserradd {
753    #[doc = "Bus Error Address"]
754    #[inline(always)]
755    pub fn berad(
756        self,
757    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Buserradd_SPEC, crate::common::R>
758    {
759        crate::common::RegisterField::<
760            0,
761            0xffffffff,
762            1,
763            0,
764            u32,
765            u32,
766            Buserradd_SPEC,
767            crate::common::R,
768        >::from_register(self, 0)
769    }
770}
771impl ::core::default::Default for Buserradd {
772    #[inline(always)]
773    fn default() -> Buserradd {
774        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
775    }
776}
777
778#[doc(hidden)]
779#[derive(Copy, Clone, Eq, PartialEq)]
780pub struct Buserrrw_SPEC;
781impl crate::sealed::RegSpec for Buserrrw_SPEC {
782    type DataType = u8;
783}
784
785#[doc = "BUS Error Read Write Register"]
786pub type Buserrrw = crate::RegValueT<Buserrrw_SPEC>;
787
788impl Buserrrw {
789    #[doc = "Error Access Read/Write Status"]
790    #[inline(always)]
791    pub fn rwstat(
792        self,
793    ) -> crate::common::RegisterField<
794        0,
795        0x1,
796        1,
797        0,
798        buserrrw::Rwstat,
799        buserrrw::Rwstat,
800        Buserrrw_SPEC,
801        crate::common::R,
802    > {
803        crate::common::RegisterField::<
804            0,
805            0x1,
806            1,
807            0,
808            buserrrw::Rwstat,
809            buserrrw::Rwstat,
810            Buserrrw_SPEC,
811            crate::common::R,
812        >::from_register(self, 0)
813    }
814}
815impl ::core::default::Default for Buserrrw {
816    #[inline(always)]
817    fn default() -> Buserrrw {
818        <crate::RegValueT<Buserrrw_SPEC> as RegisterValue<_>>::new(0)
819    }
820}
821pub mod buserrrw {
822
823    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
824    pub struct Rwstat_SPEC;
825    pub type Rwstat = crate::EnumBitfieldStruct<u8, Rwstat_SPEC>;
826    impl Rwstat {
827        #[doc = "Read access"]
828        pub const _0: Self = Self::new(0);
829
830        #[doc = "Write access"]
831        pub const _1: Self = Self::new(1);
832    }
833}
834#[doc(hidden)]
835#[derive(Copy, Clone, Eq, PartialEq)]
836pub struct Btzferradd_SPEC;
837impl crate::sealed::RegSpec for Btzferradd_SPEC {
838    type DataType = u32;
839}
840
841#[doc = "BUS TZF Error Address Register"]
842pub type Btzferradd = crate::RegValueT<Btzferradd_SPEC>;
843
844impl Btzferradd {
845    #[doc = "Bus TrustZone Filter Error Address"]
846    #[inline(always)]
847    pub fn btzferad(
848        self,
849    ) -> crate::common::RegisterField<
850        0,
851        0xffffffff,
852        1,
853        0,
854        u32,
855        u32,
856        Btzferradd_SPEC,
857        crate::common::R,
858    > {
859        crate::common::RegisterField::<
860            0,
861            0xffffffff,
862            1,
863            0,
864            u32,
865            u32,
866            Btzferradd_SPEC,
867            crate::common::R,
868        >::from_register(self, 0)
869    }
870}
871impl ::core::default::Default for Btzferradd {
872    #[inline(always)]
873    fn default() -> Btzferradd {
874        <crate::RegValueT<Btzferradd_SPEC> as RegisterValue<_>>::new(0)
875    }
876}
877
878#[doc(hidden)]
879#[derive(Copy, Clone, Eq, PartialEq)]
880pub struct Btzferrrw_SPEC;
881impl crate::sealed::RegSpec for Btzferrrw_SPEC {
882    type DataType = u8;
883}
884
885#[doc = "BUS TZF Error Read Write Register"]
886pub type Btzferrrw = crate::RegValueT<Btzferrrw_SPEC>;
887
888impl Btzferrrw {
889    #[doc = "TrustZone filter error access Read/Write Status"]
890    #[inline(always)]
891    pub fn trwstat(
892        self,
893    ) -> crate::common::RegisterField<
894        0,
895        0x1,
896        1,
897        0,
898        btzferrrw::Trwstat,
899        btzferrrw::Trwstat,
900        Btzferrrw_SPEC,
901        crate::common::R,
902    > {
903        crate::common::RegisterField::<
904            0,
905            0x1,
906            1,
907            0,
908            btzferrrw::Trwstat,
909            btzferrrw::Trwstat,
910            Btzferrrw_SPEC,
911            crate::common::R,
912        >::from_register(self, 0)
913    }
914}
915impl ::core::default::Default for Btzferrrw {
916    #[inline(always)]
917    fn default() -> Btzferrrw {
918        <crate::RegValueT<Btzferrrw_SPEC> as RegisterValue<_>>::new(0)
919    }
920}
921pub mod btzferrrw {
922
923    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
924    pub struct Trwstat_SPEC;
925    pub type Trwstat = crate::EnumBitfieldStruct<u8, Trwstat_SPEC>;
926    impl Trwstat {
927        #[doc = "Read access"]
928        pub const _0: Self = Self::new(0);
929
930        #[doc = "Write access"]
931        pub const _1: Self = Self::new(1);
932    }
933}
934#[doc(hidden)]
935#[derive(Copy, Clone, Eq, PartialEq)]
936pub struct Buserrstat_SPEC;
937impl crate::sealed::RegSpec for Buserrstat_SPEC {
938    type DataType = u8;
939}
940
941#[doc = "BUS Error Status Register %s"]
942pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
943
944impl Buserrstat {
945    #[doc = "Slave bus Error Status"]
946    #[inline(always)]
947    pub fn slerrstat(
948        self,
949    ) -> crate::common::RegisterField<
950        0,
951        0x1,
952        1,
953        0,
954        buserrstat::Slerrstat,
955        buserrstat::Slerrstat,
956        Buserrstat_SPEC,
957        crate::common::R,
958    > {
959        crate::common::RegisterField::<
960            0,
961            0x1,
962            1,
963            0,
964            buserrstat::Slerrstat,
965            buserrstat::Slerrstat,
966            Buserrstat_SPEC,
967            crate::common::R,
968        >::from_register(self, 0)
969    }
970
971    #[doc = "Slave TrustZone filter Error Status"]
972    #[inline(always)]
973    pub fn sterrstat(
974        self,
975    ) -> crate::common::RegisterField<
976        1,
977        0x1,
978        1,
979        0,
980        buserrstat::Sterrstat,
981        buserrstat::Sterrstat,
982        Buserrstat_SPEC,
983        crate::common::R,
984    > {
985        crate::common::RegisterField::<
986            1,
987            0x1,
988            1,
989            0,
990            buserrstat::Sterrstat,
991            buserrstat::Sterrstat,
992            Buserrstat_SPEC,
993            crate::common::R,
994        >::from_register(self, 0)
995    }
996
997    #[doc = "Master MPU Error Status"]
998    #[inline(always)]
999    pub fn mmerrstat(
1000        self,
1001    ) -> crate::common::RegisterField<
1002        3,
1003        0x1,
1004        1,
1005        0,
1006        buserrstat::Mmerrstat,
1007        buserrstat::Mmerrstat,
1008        Buserrstat_SPEC,
1009        crate::common::R,
1010    > {
1011        crate::common::RegisterField::<
1012            3,
1013            0x1,
1014            1,
1015            0,
1016            buserrstat::Mmerrstat,
1017            buserrstat::Mmerrstat,
1018            Buserrstat_SPEC,
1019            crate::common::R,
1020        >::from_register(self, 0)
1021    }
1022
1023    #[doc = "Illegal address access Error Status"]
1024    #[inline(always)]
1025    pub fn ilerrstat(
1026        self,
1027    ) -> crate::common::RegisterField<
1028        4,
1029        0x1,
1030        1,
1031        0,
1032        buserrstat::Ilerrstat,
1033        buserrstat::Ilerrstat,
1034        Buserrstat_SPEC,
1035        crate::common::R,
1036    > {
1037        crate::common::RegisterField::<
1038            4,
1039            0x1,
1040            1,
1041            0,
1042            buserrstat::Ilerrstat,
1043            buserrstat::Ilerrstat,
1044            Buserrstat_SPEC,
1045            crate::common::R,
1046        >::from_register(self, 0)
1047    }
1048}
1049impl ::core::default::Default for Buserrstat {
1050    #[inline(always)]
1051    fn default() -> Buserrstat {
1052        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
1053    }
1054}
1055pub mod buserrstat {
1056
1057    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1058    pub struct Slerrstat_SPEC;
1059    pub type Slerrstat = crate::EnumBitfieldStruct<u8, Slerrstat_SPEC>;
1060    impl Slerrstat {
1061        #[doc = "No error occurred"]
1062        pub const _0: Self = Self::new(0);
1063
1064        #[doc = "Error occurred"]
1065        pub const _1: Self = Self::new(1);
1066    }
1067    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1068    pub struct Sterrstat_SPEC;
1069    pub type Sterrstat = crate::EnumBitfieldStruct<u8, Sterrstat_SPEC>;
1070    impl Sterrstat {
1071        #[doc = "No error occurred"]
1072        pub const _0: Self = Self::new(0);
1073
1074        #[doc = "Error occurred"]
1075        pub const _1: Self = Self::new(1);
1076    }
1077    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1078    pub struct Mmerrstat_SPEC;
1079    pub type Mmerrstat = crate::EnumBitfieldStruct<u8, Mmerrstat_SPEC>;
1080    impl Mmerrstat {
1081        #[doc = "No error occurred"]
1082        pub const _0: Self = Self::new(0);
1083
1084        #[doc = "Error occurred"]
1085        pub const _1: Self = Self::new(1);
1086    }
1087    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1088    pub struct Ilerrstat_SPEC;
1089    pub type Ilerrstat = crate::EnumBitfieldStruct<u8, Ilerrstat_SPEC>;
1090    impl Ilerrstat {
1091        #[doc = "No error occurred"]
1092        pub const _0: Self = Self::new(0);
1093
1094        #[doc = "Error occurred"]
1095        pub const _1: Self = Self::new(1);
1096    }
1097}
1098#[doc(hidden)]
1099#[derive(Copy, Clone, Eq, PartialEq)]
1100pub struct Buserrclr_SPEC;
1101impl crate::sealed::RegSpec for Buserrclr_SPEC {
1102    type DataType = u8;
1103}
1104
1105#[doc = "BUS Error Clear Register %s"]
1106pub type Buserrclr = crate::RegValueT<Buserrclr_SPEC>;
1107
1108impl Buserrclr {
1109    #[doc = "Slave bus Error Clear"]
1110    #[inline(always)]
1111    pub fn slerrclr(
1112        self,
1113    ) -> crate::common::RegisterFieldBool<0, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1114        crate::common::RegisterFieldBool::<0,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1115    }
1116
1117    #[doc = "Slave TrustZone filter Error Clear"]
1118    #[inline(always)]
1119    pub fn sterrclr(
1120        self,
1121    ) -> crate::common::RegisterFieldBool<1, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1122        crate::common::RegisterFieldBool::<1,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1123    }
1124
1125    #[doc = "Master MPU Error Clear"]
1126    #[inline(always)]
1127    pub fn mmerrclr(
1128        self,
1129    ) -> crate::common::RegisterFieldBool<3, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1130        crate::common::RegisterFieldBool::<3,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1131    }
1132
1133    #[doc = "Illegal Address Access Error Clear"]
1134    #[inline(always)]
1135    pub fn ilerrclr(
1136        self,
1137    ) -> crate::common::RegisterFieldBool<4, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1138        crate::common::RegisterFieldBool::<4,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1139    }
1140}
1141impl ::core::default::Default for Buserrclr {
1142    #[inline(always)]
1143    fn default() -> Buserrclr {
1144        <crate::RegValueT<Buserrclr_SPEC> as RegisterValue<_>>::new(0)
1145    }
1146}
1147
1148#[doc(hidden)]
1149#[derive(Copy, Clone, Eq, PartialEq)]
1150pub struct Dmacdtcerrstat_SPEC;
1151impl crate::sealed::RegSpec for Dmacdtcerrstat_SPEC {
1152    type DataType = u8;
1153}
1154
1155#[doc = "DMAC/DTC Error Status Register"]
1156pub type Dmacdtcerrstat = crate::RegValueT<Dmacdtcerrstat_SPEC>;
1157
1158impl Dmacdtcerrstat {
1159    #[doc = "Master TrustZone Filter Error Status"]
1160    #[inline(always)]
1161    pub fn mterrstat(
1162        self,
1163    ) -> crate::common::RegisterField<
1164        0,
1165        0x1,
1166        1,
1167        0,
1168        dmacdtcerrstat::Mterrstat,
1169        dmacdtcerrstat::Mterrstat,
1170        Dmacdtcerrstat_SPEC,
1171        crate::common::R,
1172    > {
1173        crate::common::RegisterField::<
1174            0,
1175            0x1,
1176            1,
1177            0,
1178            dmacdtcerrstat::Mterrstat,
1179            dmacdtcerrstat::Mterrstat,
1180            Dmacdtcerrstat_SPEC,
1181            crate::common::R,
1182        >::from_register(self, 0)
1183    }
1184}
1185impl ::core::default::Default for Dmacdtcerrstat {
1186    #[inline(always)]
1187    fn default() -> Dmacdtcerrstat {
1188        <crate::RegValueT<Dmacdtcerrstat_SPEC> as RegisterValue<_>>::new(0)
1189    }
1190}
1191pub mod dmacdtcerrstat {
1192
1193    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1194    pub struct Mterrstat_SPEC;
1195    pub type Mterrstat = crate::EnumBitfieldStruct<u8, Mterrstat_SPEC>;
1196    impl Mterrstat {
1197        #[doc = "No error occurred"]
1198        pub const _0: Self = Self::new(0);
1199
1200        #[doc = "Error occurred"]
1201        pub const _1: Self = Self::new(1);
1202    }
1203}
1204#[doc(hidden)]
1205#[derive(Copy, Clone, Eq, PartialEq)]
1206pub struct Dmacdtcerrclr_SPEC;
1207impl crate::sealed::RegSpec for Dmacdtcerrclr_SPEC {
1208    type DataType = u8;
1209}
1210
1211#[doc = "DMAC/DTC Error Clear Register"]
1212pub type Dmacdtcerrclr = crate::RegValueT<Dmacdtcerrclr_SPEC>;
1213
1214impl Dmacdtcerrclr {
1215    #[doc = "Master TrustZone filter Error Clear"]
1216    #[inline(always)]
1217    pub fn mterrclr(
1218        self,
1219    ) -> crate::common::RegisterFieldBool<0, 1, 0, Dmacdtcerrclr_SPEC, crate::common::RW> {
1220        crate::common::RegisterFieldBool::<0,1,0,Dmacdtcerrclr_SPEC,crate::common::RW>::from_register(self,0)
1221    }
1222}
1223impl ::core::default::Default for Dmacdtcerrclr {
1224    #[inline(always)]
1225    fn default() -> Dmacdtcerrclr {
1226        <crate::RegValueT<Dmacdtcerrclr_SPEC> as RegisterValue<_>>::new(0)
1227    }
1228}
ra4e2_pac/bus.rs

ra4e2_pac/
bus.rs
