[][src]Trait probe_rs::CoreInterface

pub trait CoreInterface: MemoryInterface {
    fn wait_for_core_halted(&mut self) -> Result<(), Error>;
fn core_halted(&mut self) -> Result<bool, Error>;
fn status(&mut self) -> Result<CoreStatus, Error>;
fn halt(&mut self) -> Result<CoreInformation, Error>;
fn run(&mut self) -> Result<(), Error>;
fn reset(&mut self) -> Result<(), Error>;
fn reset_and_halt(&mut self) -> Result<CoreInformation, Error>;
fn step(&mut self) -> Result<CoreInformation, Error>;
fn read_core_reg(
        &mut self,
        address: CoreRegisterAddress
    ) -> Result<u32, Error>;
fn write_core_reg(
        &mut self,
        address: CoreRegisterAddress,
        value: u32
    ) -> Result<(), Error>;
fn get_available_breakpoint_units(&mut self) -> Result<u32, Error>;
fn enable_breakpoints(&mut self, state: bool) -> Result<(), Error>;
fn set_breakpoint(
        &mut self,
        bp_unit_index: usize,
        addr: u32
    ) -> Result<(), Error>;
fn clear_breakpoint(&mut self, unit_index: usize) -> Result<(), Error>;
fn registers(&self) -> &'static RegisterFile;
fn hw_breakpoints_enabled(&self) -> bool;
fn architecture(&self) -> Architecture; }

Required methods

fn wait_for_core_halted(&mut self) -> Result<(), Error>

Wait until the core is halted. If the core does not halt on its own, a DebugProbeError::Timeout error will be returned.

fn core_halted(&mut self) -> Result<bool, Error>

Check if the core is halted. If the core does not halt on its own, a CoreError::Timeout error will be returned.

fn status(&mut self) -> Result<CoreStatus, Error>

fn halt(&mut self) -> Result<CoreInformation, Error>

Try to halt the core. This function ensures the core is actually halted, and returns a CoreError::Timeout otherwise.

fn run(&mut self) -> Result<(), Error>

fn reset(&mut self) -> Result<(), Error>

Reset the core, and then continue to execute instructions. If the core should be halted after reset, use the reset_and_halt function.

fn reset_and_halt(&mut self) -> Result<CoreInformation, Error>

Reset the core, and then immediately halt. To continue execution after reset, use the reset function.

fn step(&mut self) -> Result<CoreInformation, Error>

Steps one instruction and then enters halted state again.

fn read_core_reg(&mut self, address: CoreRegisterAddress) -> Result<u32, Error>

fn write_core_reg(
    &mut self,
    address: CoreRegisterAddress,
    value: u32
) -> Result<(), Error>

fn get_available_breakpoint_units(&mut self) -> Result<u32, Error>

fn enable_breakpoints(&mut self, state: bool) -> Result<(), Error>

fn set_breakpoint(
    &mut self,
    bp_unit_index: usize,
    addr: u32
) -> Result<(), Error>

fn clear_breakpoint(&mut self, unit_index: usize) -> Result<(), Error>

fn registers(&self) -> &'static RegisterFile

fn hw_breakpoints_enabled(&self) -> bool

fn architecture(&self) -> Architecture

Get the Architecture of the Core.

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Implementors

impl<'probe> CoreInterface for M0<'probe>[src]

impl<'probe> CoreInterface for M33<'probe>[src]

impl<'probe> CoreInterface for M4<'probe>[src]

impl<'probe> CoreInterface for Riscv32<'probe>[src]

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