[][src]Crate ppv_lite86

Re-exports

pub use self::arch::vec128_storage;
pub use self::arch::vec256_storage;
pub use self::arch::vec512_storage;

Modules

generic

Macros

dispatch
dispatch_light128
dispatch_light256
dispatch_light512

Traits

AndNot
ArithOps

Ops that depend on word size

BSwap
BitOps0

Ops that are independent of word size and endian

BitOps32
BitOps64
BitOps128
LaneWords4

A vector composed one or more lanes each composed of four words.

Machine
MultiLane

A vector composed of multiple 128-bit lanes.

RotateEachWord32
RotateEachWord64
RotateEachWord128
Store
StoreBytes
Swap64

Exchange neigboring ranges of bits of the specified size

UnsafeFrom
VZip

Combine single vectors into a multi-lane vector.

Vec2

A vector composed of two elements, which may be words or themselves vectors.

Vec4

A vector composed of four elements, which may be words or themselves vectors.

Words4

A vector composed of four words; depending on their size, operations may cross lanes.

u128x1
u128x2
u128x4
u32x4
u32x4x2
u32x4x4
u64x2
u64x4
u64x2x2
u64x2x4