[][src]Module nrf5340_net_pac::dppic_ns::chenclr

Channel enable clear register

Structs

CH0_W

Write proxy for field CH0

CH1_W

Write proxy for field CH1

CH2_W

Write proxy for field CH2

CH3_W

Write proxy for field CH3

CH4_W

Write proxy for field CH4

CH5_W

Write proxy for field CH5

CH6_W

Write proxy for field CH6

CH7_W

Write proxy for field CH7

CH8_W

Write proxy for field CH8

CH9_W

Write proxy for field CH9

CH10_W

Write proxy for field CH10

CH11_W

Write proxy for field CH11

CH12_W

Write proxy for field CH12

CH13_W

Write proxy for field CH13

CH14_W

Write proxy for field CH14

CH15_W

Write proxy for field CH15

Enums

CH0_A

Channel 0 enable clear register. Writing 0 has no effect.

CH0_AW

Channel 0 enable clear register. Writing 0 has no effect.

CH1_A

Channel 1 enable clear register. Writing 0 has no effect.

CH1_AW

Channel 1 enable clear register. Writing 0 has no effect.

CH2_A

Channel 2 enable clear register. Writing 0 has no effect.

CH2_AW

Channel 2 enable clear register. Writing 0 has no effect.

CH3_A

Channel 3 enable clear register. Writing 0 has no effect.

CH3_AW

Channel 3 enable clear register. Writing 0 has no effect.

CH4_A

Channel 4 enable clear register. Writing 0 has no effect.

CH4_AW

Channel 4 enable clear register. Writing 0 has no effect.

CH5_A

Channel 5 enable clear register. Writing 0 has no effect.

CH5_AW

Channel 5 enable clear register. Writing 0 has no effect.

CH6_A

Channel 6 enable clear register. Writing 0 has no effect.

CH6_AW

Channel 6 enable clear register. Writing 0 has no effect.

CH7_A

Channel 7 enable clear register. Writing 0 has no effect.

CH7_AW

Channel 7 enable clear register. Writing 0 has no effect.

CH8_A

Channel 8 enable clear register. Writing 0 has no effect.

CH8_AW

Channel 8 enable clear register. Writing 0 has no effect.

CH9_A

Channel 9 enable clear register. Writing 0 has no effect.

CH9_AW

Channel 9 enable clear register. Writing 0 has no effect.

CH10_A

Channel 10 enable clear register. Writing 0 has no effect.

CH10_AW

Channel 10 enable clear register. Writing 0 has no effect.

CH11_A

Channel 11 enable clear register. Writing 0 has no effect.

CH11_AW

Channel 11 enable clear register. Writing 0 has no effect.

CH12_A

Channel 12 enable clear register. Writing 0 has no effect.

CH12_AW

Channel 12 enable clear register. Writing 0 has no effect.

CH13_A

Channel 13 enable clear register. Writing 0 has no effect.

CH13_AW

Channel 13 enable clear register. Writing 0 has no effect.

CH14_A

Channel 14 enable clear register. Writing 0 has no effect.

CH14_AW

Channel 14 enable clear register. Writing 0 has no effect.

CH15_A

Channel 15 enable clear register. Writing 0 has no effect.

CH15_AW

Channel 15 enable clear register. Writing 0 has no effect.

Type Definitions

CH0_R

Reader of field CH0

CH1_R

Reader of field CH1

CH2_R

Reader of field CH2

CH3_R

Reader of field CH3

CH4_R

Reader of field CH4

CH5_R

Reader of field CH5

CH6_R

Reader of field CH6

CH7_R

Reader of field CH7

CH8_R

Reader of field CH8

CH9_R

Reader of field CH9

CH10_R

Reader of field CH10

CH11_R

Reader of field CH11

CH12_R

Reader of field CH12

CH13_R

Reader of field CH13

CH14_R

Reader of field CH14

CH15_R

Reader of field CH15

R

Reader of register CHENCLR

W

Writer for register CHENCLR